HILLSBORO, OR – OCTOBER 12, 2010 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its third-generation mixed-signal devices, the Platform Manager™ family. The programmable Platform Manager devices are expected to simplify board management design significantly by integrating programmable analog and logic to support many common functions, such as power management, digital housekeeping and glue logic. By integrating these support functions, Platform Manager devices can not only reduce the cost of these functions compared to traditional approaches, but also can improve system reliability and provide a high degree of design flexibility that minimizes the risk of circuit board re-spins.
A video demonstration of the Platform Manager can be viewed here:
English – http://www.latticesemi.com/ptmEN
Mandarin – http://www.latticesemi.com/ptmCN
Japanese – http://www.latticesemi.com/ptmJP
Images of the Platform Manager can be viewed and downloaded here: http://www.latticesemi.com/ptmimages
“Lattice first transformed board power management design with its Power Manager II products, which have been enthusiastically adopted across a wide variety of systems due to the improvements in cost, reliability and design cycle time they enable,” said Gordon Hands, Director of Marketing for Low Density and Mixed Signal Solutions. “We expect that customers will rapidly adopt the new Platform Manager products, as they expand these same benefits across a broader range of functions.”
Platform Manager devices are expected to be used in a broad range of applications where the complexity of the board management functions can benefit from the integrated capabilities that they provide. Typical applications are expected to include wireless infrastructure, networking core equipment, server, data storage and high-end industrial instrumentation.
About the Platform Manager Family
The Platform Manager product family consists of two devices, the LPTM10-1247 and LPTM10-12107. The LPTM10-1247 device can monitor 12 voltage rails and supports 47 digital I/O, while the LPTM10-12107 monitors up to 12 voltage rails and supports 107 digital I/O. Functionally, these devices include both a power management section and a digital board management section. The power management section consists of a programmable threshold, precision differential input comparator block with an accuracy of 0.7%, a 48-macrocell CPLD, programmable hardware timers, a10-bit analog to digital converter and a trim block for the trimming and margining of supplies. The digital board management section consists of a 640-LUT FPGA and programmable logic interface I/O.
Transforming Board Management Design with Platform Manager Devices
Modern circuit boards use devices such as CPUs, FPGAs and ASICs to perform the primary processing functions. These primary function devices require multiple board-mounted power supplies that need to be turned on and off in a specific sequence, monitored for faults and trimmed for voltage accuracy. In addition, the input power to the board often requires redundant power management and, in the case of plug-in boards, hot-swap functionality. All the functions that control various power rails are collectively called power management. After all supplies are turned on, the system requires digital support functions such as reset distribution, start-up configuration control for FPGAs and ASSPs, watchdog timers and a system bus interface for a microcontroller. These digital support functions are collectively called digital management. Power and digital management together are often referred to as board or platform management. Lattice’s new Platform Manager family provides a single-chip solution that integrates all of these power and digital management functions.
The programmable Platform Manager device, with its ability to integrate both power management and digital management functions, reduces the number of board components, saving time and board area, and reducing design risk. The traditional methods of designing with a collection of unique single-function ICs for power management, and complex design partitioning across multiple programmable devices for digital support functions, are simply replaced by the single chip Platform Manager device. It is anticipated that in many cases the Platform Manager device can cut the bill-of-material cost by 50%.
When implemented correctly, board power management can dramatically improve system reliability, because when operation under abnormal or faulty conditions is prevented, damage to components and corruption of system memory is avoided. With the traditional approach to power management, designers often reduce the number of supplies monitored, the speed of response to errors and the accuracy of monitoring in order to meet cost targets, compromising board reliability. The Platform Manager avoids this compromise with its low cost and ability to monitor up to 12 rails with 0.7% accuracy and a <65uS response to power supply faults.
In addition, the Platform Manager device provides several benefits compared to traditional design methodology, such as increased flexibility, on-board reprogrammability and software-based design and simulation. In those cases where these benefits help to avoid a board re-spin, weeks or even months can be saved from the project schedule.
Design Software Support
The Platform Manager product family will be supported by PAC-Designer® 6.0 and the Starter version of ispLEVER® 8.1 SP1 design software tools. There is no charge for either software package. For information about how obtain a copy, go to www.latticesemi.com/ptm.
To accelerate design time using the Platform Manager, Lattice will provide four free reference designs and three free IP cores that implement common functions such as Fault Logging into Non-volatile Memory, Closed Loop Margining and Interface to I2C or SPI bus masters. Detailed information about the reference designs and IP cores may be downloaded from the Lattice website at www.latticesemi.com/ip.
In addition, a Platform Manager design development kit, containing an evaluation board complete with demonstration code and documentation, can be purchased for $109. This board allows users to see known good hardware in five minutes and to recompile the provided source code to get to a known good starting point in thirty minutes. For more details and buying information please visit:www.latticesemi.com/ptmdevkit
Pricing and Availability
The new Platform Manager devices are available in commercial and industrial temperature ranges, and are available in environmentally friendly Lead-Free/Halogen-Free packages. High volume pricing for the LPTM10-1247 device in a 128-pin TQFP package is $3.75. Samples are available now.
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD, programmable Power Management and Clock Management solutions. For more information, visit www.latticesemi.com
