Articles – Page 259

August 8, 2011

It doesn’t take an old-timer to notice that traffic in Santa Cruz sucks. The number of people has grown, and it’s still relying on the same old road network. While once it might have taken a half hour to get from Westside to Aptos, it can now take at least that long just to get to the freeway at the wrong time of day. For the most part, it’s faster to use a bicycle.

Clearly, scaling has failed. Well, during rush hour anyway. Adapting to more users of the traffic resources … Read More → "There’s Something About Many"

Marrying Flexibility and Complexity

Verifying a DSP in an FPGA

by Jim Turley

August 4, 2011

FPGAs are an excellent choice for speeding the silicon realization of complex digital signal processing (DSP) algorithms. However, the flexibility of the fabric cannot supplant the complexity of the verification. Traditional FPGA “burn-and-churn” techniques must be replaced with a plan-driven approach that captures the overall verification intent. From there, the randomized tests constructed with Accellera’s Universal Verification Methodology (UVM™) should be combined with formal analysis to predictably converge the verification. With a suitably sophisticated approach, the DSP-FPGA marriage will be a happy one.

What is Your Intent?</ … Read More → "Marrying Flexibility and Complexity"

Revenge of the Bride of Moore’s Law Strikes Back II

Atmel’s SAM9 Microcontrollers Just Keep Getting Better, Cheaper

by Jim Turley

August 3, 2011

Pop quiz: what has a 32-bit processor, runs Android or Linux, and comes with a high-speed DRAM interface, options for an LCD and touch screen, NAND flash with error correction, connection to a camera, dual CAN bus interfaces, a V.90 modem, and high-speed USB?

Is it a new tablet computer? The latest smart phone? A laptop PC?

Nope. It’s a $6 microcontroller chip from Atmel. Meet SAM9. Oh, and it consumes only 100 mW at full throttle. Nice.

Atmel’s new SAM9 chips (there are five of them) are the newest mighty … Read More → "Revenge of the Bride of Moore’s Law Strikes Back II"

Tiny, Tiny Tech

SiliconBlue's Really Small FPGAs

by Kevin Morris

August 2, 2011

Pop Quiz: What kind of part is found on the BOM for many smartphones, feature-phones, cameras, camcorders, portable GPS units, tablets, and other mobile devices? HINT: Its size is as small as 2.5mmX2.5mm, standby current is in the microwatts, and cost is in the pennies.

What? You guessed an FPGA? You must have cheated! Oh, or, looked at the title for the article, or read ahead, or maybe you already know about SiliconBlue.

We have mentioned several times that it is near impossible to compete head-to-head with dominant, … Read More → "Tiny, Tiny Tech"

Xilinx Virtex-6 FPGAs – 1.170Tbps throughput

by Jim Turley

August 1, 2011

Martin Gilpatric, transceiver technical marketing engineer at Xilinx, demonstrates the Virtex® HX380T GTH transceivers, using ChipScope and an ML628 evaluation board. The Virtex®-6 family provides the newest, most advanced features in the FPGA market. Virtex-6 FPGAs are the programmable silicon foundation for Targeted Design Platforms that deliver integrated software and hardware components to enable designers to focus on innovation as soon as their development cycle begins. Using the third-generation ASMBL™ (Advanced Silicon Modular Block) column based architecture, the Virtex-6 family contains multiple distinct … Read More → "Xilinx Virtex-6 FPGAs – 1.170Tbps throughput"

PowerPC to MIPS® Architecture Migration Guide (REVISED)

by Jim Turley

August 1, 2011

Software investment is the biggest ticket item in any project. Hence it is important to choose an instruction set architecture (ISA) that offers a truly scalable solution for future development. To address various embedded market segments, MIPS Technologies offers distinct, binary-compatible families of processor cores that span applications from 32-bit microcontrollers all the way to 64-bit multi-threaded, superscalar many-core processors for networking infrastructure, and numerous digital consumer markets in between. Since one can seamlessly scale the performance range between a wide array of processors, the MIPS® architecture … Read More → "PowerPC to MIPS® Architecture Migration Guide (REVISED)"

Choice of an ISA for Embedded Designs

by Jim Turley

August 1, 2011

Software investment is the biggest ticket item in any project. Hence the choice of an ISA that offers a scalable solution is an important consideration. MIPS and our SoC eco system offer distinct families of processor cores that span from 32-bit micro controllers all the way to 64-bit multi-threaded super-scalar cores from single-core to many cores, to address various segments of the embedded markets. For either a new design or a follow on or upgrade to an existing design, the choice of MIPS as the ISA offers an ideal path … Read More → "Choice of an ISA for Embedded Designs"

“Smart” Connected Home Entertainment with Android

by Jim Turley

August 1, 2011

Experience the SmartCE (Connected Entertainment) for Android platform from MIPS Technologies in this new video demonstration. The SmartCE Platform enables MIPS licensees and their customers to bring differentiated connected entertainment solutions to market quickly.

The platform includes the following capabilities:

Android operating system enhanced for TV screen
The Home Jinni SmartCE application, … Read More → "“Smart” Connected Home Entertainment with Android"

4K Format Conversion Reference Design

by Jim Turley

August 1, 2011

4K resolution is the next major enhancement in video because of the benefits in picture clarity and realism. Many leading projector, broadcast, and camera manufacturers are shipping 4K enabled systems. Altera enables this next generation format conversion by reducing the system device count, which lowers the overall costs, reduces the cost of development, and simplifies board design. Previous systems required as many as nine off-the-shelf devices to perform 4K format conversion—four 1080p format conversion devices and five devices for serial digital interface (SDI) input and output.

How To Begin A Simple FPGA Design

by Jim Turley

August 1, 2011

This training is for engineers who have never designed an FPGA before.You will learn about the basic benefits of FPGAs and how to create a simple FPGA design using Quartus II software.

At the end of this course, you’ll be able to start a new FPGA design, create a schematic using the graphic editor, convert schematic and HDL files into schematic symbols, and configure an FPGA.

… Read More →