feature article
Subscribe Now

Lattice Launches Mach-NX

System Control Meets Industrial-Strength Security

Pop Quiz – which FPGA company has sold the most devices?

Nope, wrong. Guess again.

And… wrong again. Neither Xilinx nor Altera/Intel, despite hovering around 80% combined FPGA market share for the last couple of decades, has shipped the most FPGA devices. That distinction goes to Lattice Semiconductor, and not by a small margin. The reason, of course, is that, in recent years, Lattice has focused on the mid-range and low-end segment of the market, while the better-known programmable logic companies have struggled for supremacy in the largest, most expensive FPGAs, FPGA-SoCs, and similar components. 

This strategic emphasis on lower-cost, higher-volume sockets has helped Lattice deliver billions of FPGAs into a wide range of systems across numerous market segments. And, as the capabilities of FPGA technology have increased, Lattice has drafted behind the big two, bringing technology that was considered high-end just a few years ago into much more cost-constrained applications, and then they have taken the technology in new directions with pre-engineered solutions that significantly lower the bar for engineering teams without vast FPGA expertise to take advantage of the technology.

Most recently, Lattice introduced a new FPGA family – Mach-NX, which is a new line of secure system-control devices built on the company’s “Nexus” platform, which is the architecture, process, and solutions technology/strategy basis for the company’s recent new line of FPGA-based solutions. On the semiconductor front, Nexus is based on a 28nm FDSOI process, which brings numerous advantages for low-power, high-reliability and high-volume applications. 

Compared with bulk CMOS, Lattice says FD-SOI allows them to achieve “75% lower power and 100x lower soft error rate.” Architecture-wise, the company has beefed up the on-chip memory resources, which allows greater memory locality for better performance and security and can reduce or eliminate off-chip memory access requirements in many applications, which cuts system and board complexity, reduces power consumption, minimizes cost, and reduces form factor. Other hard resources such as multipliers/MACs/DSP Blocks have been re-engineered to better fit the demands of current applications such as AI inference.

Finally, and most relevant for their latest announcement, Lattice has built significant security features into their latest devices. This is becoming critical for ever more applications as more systems become interconnected and attacks on all types of devices become more common and more sophisticated. In addition to building chips that are more closely adapted to modern applications than conventional FPGAs, however, a key part of Lattice’s strategy is to deliver solutions for specific application domains that are as turnkey as possible, reducing or eliminating the need for FPGA experts on the customer’s design team. 

All of these elements of Lattice’s strategy come together with Mach-NX. Lattice says Mach-NX delivers “heightened security features and the fast, power-efficient processing needed to implement a real-time Hardware Root-of-Trust (HRoT) on future server platforms, as well as computing, communications, industrial, and automotive systems.” Given the recent wave of news of high-profile hacking, those capabilities are likely to be interesting to a large number of design teams. What Lattice has done with Mach-NX is to build a system control chip with strategic hardening of performance-critical blocks such as security and key interfaces. This is the company’s second iteration of a security-focused system control device, adding some nice capabilities to the MachXO3D we covered in 2019.

The star of the show is a new secure enclave – a 384-bit hardware-based crypto engine supporting SHA, HMAC, and ECC that supports reprogrammable bitstream protection, provides hardware root-of-trust, and helps to secure firmware. The security system features a hard RISC-V processor core, which can be used to configure and control all of the security features, and which vastly simplifies configuration. Using the secure enclave, your system can verify and install over-the-air firmware updates to stay compliant with the latest security guidelines and protocols. In the event of a detected attack, the FPGA’s parallel processing architecture and dual-boot flash memory configuration provide “near instantaneous” response times for detection and recovery. The hardware capabilities of the FPGA give Mach-NX a significant performance advantage on this front, compared with MCUs used for system management and security.

The more traditional FPGA fabric and IO blocks enable system control functions such as power management and fan control. The devices boast up to 8.4K LUTs of user-programmable logic and 2669 kbits of user flash memory, and they feature a dual-boot flash capability. On the IO front, there are up to 379 programmable I/Os supporting a range of IO voltages including 1.2/1.5/1.8/2.5/3.3V – which should make hooking up the rest of your system easy in a wide range of applications.

Mach-NX FPGAs will support the Lattice Sentry solutions stack, which is a collection of customizable embedded software, reference designs, IP, and development tools designed to accelerate the implementation of secure systems compliant with NIST Platform Firmware Resiliency (PFR) Guidelines (NIST SP-800-193). Lattice says that the RISC-V-based security system makes it easy to develop compliant security systems in a matter of days.

Lattice has been extremely successful with their current security/control offering. Designers of server platforms have been big adopters of the technology, at least in part due to the almost “instant-on” flash-based configuration, which allows the Mach device to come up first, secure the system, and then choreograph the startup of the rest of the server, and then, at shutdown time, sweep up the floor before turning out the lights. Lattice says Mach FPGAs have an attach rate of over 80 percent on current shipping server platforms, which is an impressive achievement.

Of course, the best security system in the world can’t help if you aren’t sure you’re getting the real thing. Lattice has a sophisticated supply chain security subscription service called Lattice SupplyGuard – for end-to-end supply chain protection. SupplyGuard “tracks locked Lattice FPGAs through their entire lifecycle, from the point of manufacture, through transport via the global supply chain, system integration and assembly, initial configuration, and deployment.”

In most of Lattice’s current markets, they are running virtually unopposed. The high-end FPGA companies have almost no focus in these markets and have not invested in innovation there in years, allowing Lattice free reign. Other solutions (typically various SoCs with MCU-based solutions) don’t have an answer to the performance, power efficiency, and flexibility Lattice gets from their FPGA technology. It will be interesting to watch as Lattice continues to evolve their strategy and their platform and releases compelling solutions to a variety of key design challenges.

 

Leave a Reply

featured blogs
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....
Apr 18, 2024
Analog Behavioral Modeling involves creating models that mimic a desired external circuit behavior at a block level rather than simply reproducing individual transistor characteristics. One of the significant benefits of using models is that they reduce the simulation time. V...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

Advanced Gate Drive for Motor Control
Sponsored by Infineon
Passing EMC testing, reducing power dissipation, and mitigating supply chain issues are crucial design concerns to keep in mind when it comes to motor control applications. In this episode of Chalk Talk, Amelia Dalton and Rick Browarski from Infineon explore the role that MOSFETs play in motor control design, the value that adaptive MOSFET control can have for motor control designs, and how Infineon can help you jump start your next motor control design.
Feb 6, 2024
10,311 views