“It will require a great deal more than a letter of appeal to achieve conversion.” — Fredrik Bajer (1837–1922)
You could see them coming a mile off. Two nice young men, riding bicycles. They wore pressed white shirts and black ties when they came to my door and asked if I’d heard The Good News. If not, they’d be happy to sit with me and explain the error of my ways.
I was skeptical at first, but their words touched me. Now I’m a convert. I may not be a zealous evangelist – not yet, anyway – but I’ve lost my initial agnostic skepticism and I’m willing to listen to a few verses from the hymnal. Yes, I’ve seen the RISC-V light.
Chief protagonist in my conversion was the high priest of microprocessor design himself, Dave Ditzel. If you’re not a dyed-in-the-wool CPU nerd, Ditzel’s name may not ring any church bells, but among the ISA cognoscenti, he’s kind of a big deal. The man was vice president of Intel’s Hybrid Parallel Computing division, CTO at Sun Microsystems, got his Master’s Degree at Berkeley under Dr. David Patterson (who co-wrote the book on RISC architecture), and was founder and CEO of Transmeta, the company that designed an entire x86-compatible processor that ran code under emulation. In short, the man knows his 1’s and 0’s.
So, when Ditzel disappeared from the CPU-scape radar for a few years, everyone assumed he’d either retired to the Bahamas or started a new company on the quiet. That quiet ended last week when Ditzel and his colleagues announced that their new company, called Esperanto Technologies, was designing a high-end processor chip for artificial intelligence (AI), and that this new AI supercomputer would be based on – RISC-V.
Say what? You mean that free, open-source, not-very-interesting CPU design that all the college kids are playing with? That cheap knockoff teaching tool? The Pascal of programming toys? That RISC-V?
The very same. Ditzel and I spent some quality time playing Twenty Questions regarding Esperanto’s processor, the first one being, “WTF, Dave?”
As Ditzel explains it, artificial intelligence, machine learning, and graphics all have a few things in common. One, they’re often “embarrassingly parallel,” so their workloads respond well to massively multicore chip designs. They also need special computing hardware; normal CPUs with traditional von Neumann instruction sets don’t do the job very efficiently. Third, almost all modern computers, and future AI machines in particular, will be defined by their power requirements. “Tell me your energy budget and I can tell you pretty accurately how much computing you’re going to be able to get done,” says Ditzel. Finally, he acknowledges that creating a new microprocessor instruction set from scratch is very difficult. He knows; he’s done it before.
The solution, as Esperanto sees it, is to take a generic microprocessor and add onto it. That way, you get the benefits of a baseline CPU with a “normal” compiler, operating systems, and community support. But you also get a custom processor with AI-specific extensions designed in-house by Esperanto’s engineers. It’s a vanilla RISC processor when you want it to be, and a high-end AI monster when you need it to be.
Was there anything specific about RISC-V that suggested itself for this kind of work? Is it a particularly good AI platform? No, not really, says Ditzel. In fact, Esperanto didn’t start out using RISC-V at all; his team began by designing their own CPU architecture from scratch, complete with its own Linux port and compiler, on the theory that good AI requires its own dedicated hardware. That’s still true, but there was no point in trying to launch yet another all-new CPU instruction set into the market. Better to leverage something that’s already been done, just so long as the existing CPU isn’t weighted down with baggage that slows the AI acceleration.
RISC-V wasn’t even on the shopping list of alternatives, but the more Esperanto’s engineers looked at it, the more they realized it was more than a toy or just a teaching tool. “We assumed that RISC-V would probably lose 30% to 40% in compiler efficiency [versus Arm or MIPS or SPARC] because it’s so simple,” says Ditzel. “But our compiler guys benchmarked it, and darned if it wasn’t within 1%.”
“We realized that the RISC-V guys made a very careful set of tradeoffs. It’s called ‘RISC-Five’ for a reason, not ‘RISC-One or -Two.’ There were four prior generations. About a thousand people contributed to the RISC-V instruction set [versus just one or two companies for the better-known CPUs], and that’s a very nice way of going about things.”
Ditzel credits RISC-V’s youth with its untainted simplicity. Processors, like operating systems, tend to accumulate excess baggage, cruft, and overhead as they mature. The best example of that being the x86 and its fabulously labyrinthine microarchitecture. Even many supposedly reduced instruction sets have accumulated a few barnacles on their hulls over the years. RISC-V, in contrast, is elegantly free from ornamentation. At least, it was when Esperanto started.
To the baseline architecture the company adds its own secret sauce, and that is most definitely company proprietary. Anyone can fabricate their own RISC-V processor (cf. SiFive or Andes), but not just anyone can turn it into “an AI supercomputer on a chip,” as the company touts it. RISC-V’s licensing (such as it is) permits unrestricted modification to the baseline core, which was vital to Esperanto’s goals. There is no licensing fee, and no licensing body with which to negotiate. The company had free rein to do whatever they wished. In effect, they designed a new processor around an existing processor.
Esperanto is still a few years away from shipping silicon – the company is deliberately coy about dates, schedules, and timelines – but they have hinted at what they’re up to. The chip will be fabricated in TSMC’s 7nm process, which is cutting-edge technology, and likely still will be when the chip comes out. Oh, and it will have more than four thousand CPU cores in it.
The company is working on two different CPU core designs simultaneously, and both will be integrated into the chip, in a manner very similar to Arm’s Big.Little pairing of Cortex CPU cores. The “big” part is tentatively called ET-Maxion and will be a 64-bit, single-thread, out-of-order machine. The “little” one is (predictably) called MT-Minion, and is also a 64-bit implementation, but with an in-order pipeline and heavy with vector floating-point extensions. It’s the Minions, naturally, that do most of the work, under the guidance of the Maxions. Esperanto envisions 4096 Minions overseen by 16 Maxions.
The company has shown some simulated results running AI benchmarks and game demos, which indicate that the chip design is far along. Tapeout can’t be far away, and silicon might appear within a year or so, if all goes well. Interestingly, the same (simulated) chip design was used for both the AI demos and the graphically intensive game demos, suggesting that Esperanto’s CPU extensions are equally adept at both workloads. Ditzel admits that graphics and machine learning algorithms aren’t all that different. And, besides, with a 7nm process, there’s a lot of room on the die for acceleration hardware. Even 4096 copies of it.
Esperanto’s business model is to sell chips, but also to license its bastardized RISC-V processor design to outside parties. Presumably, licensing deals would be limited to noncompetitors, but that’s up to the business team to decide. The company doesn’t come right out and say it, but Arm (the British firm no longer uses all-caps in its name, following its change of ownership) is clearly the CPU company in Esperanto’s crosshairs.
Arm processor licenses are fabulously expensive, and may be getting even more so. For many microcontroller and microprocessor vendors, however, an Arm license is just part of the cost of doing business, like paying for rent and utilities. No Arm-compatible MCU or CPU product line, no customers in the lobby. And with Imagination Technologies in a tailspin, the company has a near-monopoly in CPU IP. Those conditions should theoretically open a large pricing umbrella under which Esperanto can operate. If Ditzel’s firm charged, say, “merely” a half-million dollars, they’d undercut Arm licensing fees by a wide margin. Whether CPU makers are ready to start over with yet another new architecture, however, remains to be seen. They may prefer to amortize their substantial investment in Arm for another few years – or decades.
On the silicon side, Esperanto will compete with GraphCore and nVidia, among others. Ditzel naturally believes that his company will have the performance advantage, as well as an energy-efficiency advantage, but we’re at least a year away from knowing for sure.
As with so many things, there are a lot of unanswered questions about Esperanto, its massively parallel AI processor, and its potential in the market. Even the company’s headcount is a secret. But Ditzel hinted that he’s assembled an all-star team of disaffected CPU designers who’ve been waiting years for a new technical challenge. “We didn’t want to go to our graves leaving x86 and Arm as the last two CPU architectures in the world,” he asserts.
Maybe all the predictions won’t come true. Maybe none of them will. But in the meantime, I’ve seen how RISC-V provides real value to a development team that easily could, and did, design its own CPU from scratch but chose to use the open-source core instead. It’s a testament to RISC-V and its creators and evangelists. Hallelujah.
One thought on “Another RISC-V Religious Conversion”
I have seen CPUs evolve from ANFSQ-7 to IBM 7044, IBM 360, IBM 801(which to me is the daddy of RISC since John Cocke won the Turing award for it) to the present.
First there were accumulator machines, index registers, scientific/fixed point and commercial/decimal, general purpose registers, IBM360/CISC with both fixed point and decimal, also floating point.
Then came operating system and general purpose compilers(preceded by FORTRAN an COBOL) also FORTH and stack machine.
Now MS Windows uses x86 to emulate a stack machine in the dotNet framework.
The heart of the matter is that add, subtract, multiply, divide, and, or, exclusive or, do the computation while all the other stuff gets the data and takes away the results.
The “other stuff” just gets(loads) and puts(stores) to memory. Once you get past the hype of out-of-order, multi-level cache, multi-core, cache coherency , etc. then it is like going back to the IBM7044 era with general purpose registers in place of index registers.
Now that we have come full circle and re-invented the wheel, it is if/else, for, while, do, and assignment statements that are what programmers use to write code.
And not once have I read of a computer that could execute these statements without first having a monstrous compiler crank out byte code or RISC instructions.
Marketing hype and superficial knowledge of computers has won.