feature article
Subscribe Now

Altera unveils slightly more detail about the Agilex 3 FPGA family a year after announcing it

At Altera’s recent Innovators Day, the company’s CEO Sandra Rivera mostly rehashed the newly freed FPGA company’s goals and plans. She also disclosed just a little more information about the upcoming Agilex 3 FPGA family, slated to become Altera’s low-end offering in the growing Agilex FPGA family of families. In her keynote presentation, Rivera said that the Agilex 3 FPGA family would include devices with 25K to 135K logic elements, which squarely overlays the company’s aging Cyclone V FPGA family. The Agilex 3 family will therefore usher end-product designs in the Cyclone V FPGA class into the Agilex architectural tent. With this announcement, Altera also published a table on its Website that nicely summarizes the entire Agilex FPGA family of families, at least as it exists today. Here’s the table:

 

The Agilex FPGA family of families now ranges from the low-end Agilex 3 series with a minimum of 25K logic elements through the Agilex 5, 7, and 9 series with as many as 4M logic elements. Image credit: Altera/Intel

From the above table, you can see that the low-end Agilex 3 FPGA family and the mid-range Agilex 5 FPGA family overlap quite a bit with respect to logic element count. However, there’s a significant difference in the amount of on-chip memory, the number of multipliers, PCIe support (PCIe 3.0 versus PCIe 4.0), SDRAM support, I/O count, and high-speed serial transceiver count between the Agilex 3 and Agilex 5 FPGA families. The Agilex 3 parts have fewer of these resources, and that’s precisely what you’d expect from a differentiated low-end product.

The most significant characteristic about the Agilex 3 FPGAs, in my opinion, is that they can replace 28nm Cyclone V SoC devices while delivering roughly double the performance of those much older devices. Altera shipped the first Cyclone V SoC devices in late 2012. That’s more than a decade ago and it’s even a couple of years before Intel bought Altera in 2015. It has taken Altera a very, very long time to refresh its entry in the low-end FPGA product niche, and a lot has happened to this FPGA market segment in the intervening years. In that interim period, Lattice Semiconductor noted Intel’s (and Xilinx’s) lack of interest in the low-end FPGA product segment and moved into the territory. Microchip, which bought Microsemi in 2018 and thereby acquired the Actel FPGA product line, did the same. It’s been a busy decade for the low-end FPGA market despite Intel’s and Xilinx’s lack of interest.

Altera’s Agilex FPGA family brings a few desirable Agilex architectural features to the low-end. Perhaps the most significant for some design teams is the extension of the Agilex HyperFlex programmable logic fabric architecture to the low end. This extension allows designers to learn and use just one architecture and that architecture’s quirks (all FPGA architectures have quirks) across the entire range of FPGA-based designs.

If you dig into the Agilex 5 and Agilex 3 product briefs, you’ll find a significant difference in programmable logic fabric speed. Now, I strongly advise you to take any FPGA vendor’s claims of absolute programmable logic speed with a big grain of salt, because the maximum operating clock rate in an FPGA is heavily dependent on your design. However, the relative speeds within one manufacturer’s product line ought to at least correlate even if the actual numbers aren’t especially accurate. (They’re not.)

Altera rates the Agilex 5 D-series FPGA’s maximum fabric speed at 600 MHz – on par with the Agilex 7 FPGA family – and rates the Agilex 5 E-series FPGA’s maximum fabric speed at 350 to 500 MHz, depending on which of three core operating voltages (0.75, 0.78, and 0.8 volts) that you select for the target device. Altera rates the Agilex 3 FPGA’s maximum fabric speed at 345 MHz, which is slightly slower than Agilex 5 E-series devices set for their lowest core voltage and slowest operation.

I wrote about the Agilex 3 FPGA family just over a year ago when it was first announced by Intel. In my EEJournal article titled “Intel Heats Up and Expands its Agilex FPGA family,” I wrote:

“Intel has decided that ‘Agilex’ will be the company’s FPGA brand going forward. To that end, the company announced the low-end (or ‘cost optimized’ in FPGA speak) Agilex 3 FPGAs, which are power and cost-optimized FPGAs stuffed into compact form factors for designs that have need for the FPGAs to consume minimal pc board real estate. Intel is positioning Agilex 3 devices as ‘essential building blocks targeted for a range of applications across markets, including system/board monitoring and management, video and vision, protocol expansion, portable imaging and displays, sensor fusion, drives, robotics I/O expansion and others.’

“The Agilex 3 family includes B- and C-Series devices. Agilex 3 B-Series FPGAs have higher I/O density and are housed in packages with smaller footprints. They also consume less power than Intel MAX 10 FPGAs​. Agilex 3 B-Series FPGAs target board- and system-level management functions, including Intel’s server platform management (PFM) applications.

“Intel has long ignored the low end of the FPGA market, as has AMD, which has allowed Lattice Semiconductor to make significant market gains in that arena. Both Intel and AMD have recently re-energized their low-end aspirations for the programmable-logic market, and the Intel Agilex 3 family is clearly a move designed to stop or even reverse Lattice’s gains. Lest you think that Intel is ready to obsolete its existing low-end devices, the Cyclone and MAX FPGAs and CPLDs, the company has already announced that it has made the strategic investments needed to ensure that these older products will continue to be available at least until the year 2035. Of course, the price for these older components is not guaranteed, so caveat emptor. For new low-end FPGA designs, you might consider using the new Intel Agilex 3 FPGAs.”

Not much has changed since I wrote that article a year ago, but one thing that has changed is that Altera’s latest table of Agilex FPGAs shows only the previously announced Agilex 3 C-series devices and not the previously disclosed Agilex 3 B-series devices with smaller packages and more I/O pins. It’s not clear whether those B-series devices will be revealed later or whether they’re indefinitely postponed. After all, much of Intel’s future is up in the air at the moment – the company is losing a lot of technical talent as it offers early retirement packages to shore up the company’s short-term profitability – and that cloud of uncertainty touches Altera as well. Meanwhile, Rivera said that software support for Agilex 3 C-series devices will start in Q1 2025, and that Altera expects that production device and development kit shipments will start in mid-2025.

Leave a Reply

featured blogs
Dec 2, 2024
The Wi-SUN Smart City Living Lab Challenge names the winners with Farmer's Voice, a voice command app for agriculture use, taking first place. Read the blog....
Dec 3, 2024
I've just seen something that is totally droolworthy, which may explain why I'm currently drooling all over my keyboard....

featured video

Introducing FPGAi – Innovations Unlocked by AI-enabled FPGAs

Sponsored by Intel

Altera Innovators Day presentation by Ilya Ganusov showing the advantages of FPGAs for implementing AI-based Systems. See additional videos on AI and other Altera Innovators Day in Altera’s YouTube channel playlists.

Learn more about FPGAs for Artificial Intelligence here

featured paper

Quantized Neural Networks for FPGA Inference

Sponsored by Intel

Implementing a low precision network in FPGA hardware for efficient inferencing provides numerous advantages when it comes to meeting demanding specifications. The increased flexibility allows optimization of throughput, overall power consumption, resource usage, device size, TOPs/watt, and deterministic latency. These are important benefits where scaling and efficiency are inherent requirements of the application.

Click to read more

featured chalk talk

Ultra-low Power Fuel Gauging for Rechargeable Embedded Devices
Fuel gauging is a critical component of today’s rechargeable embedded devices. In this episode of Chalk Talk, Amelia Dalton and Robin Saltnes of Nordic Semiconductor explore the variety of benefits that Nordic Semiconductor’s nPM1300 PMIC brings to rechargeable embedded devices, the details of the fuel gauge system at the heart of this solution, and the five easy steps that you can take to implement this solution into your next embedded design.
May 8, 2024
39,102 views