feature article
Subscribe Now

$4 Logic Analyzer Based on Raspberry Pi Pico

Here’s a truly inspired project. Dr. Agustín Gimenez Bernad, a Senior Developer in ServiZurich S.A. in Spain, has created one of the most brilliant hacks I’ve seen yet. He’s built a 24-bit logic analyzer that samples at 100 Msamples/sec and stores 32K samples from nothing more than a $4 Raspberry Pi Pico board and some clever code. There’s a lot to learn from this project, which is posted with some very fine documentation on GitHub, but if you just need a $4 logic analyzer, there’s still a lot to be admired.

I go way, way, way back with logic analyzers. My Senior Lab project in college was a logic analyzer. I ordered a bunch of 2102 1Kbit SRAMs from Bill Godbout Electronics, which was located in a Quonset hut on the edge of the Oakland airport. Those SRAMs were a hot item back then. Put eight of them together and you had all of 1Kbyte of RAM for your 8080 microprocessor. I didn’t know it at the time, but Godbout supplied parts to all the early microcomputer pioneers at the Homebrew Computer Club in the San Francisco Bay area including Lee Felsenstein (Processor Technology Sol 20) and George Morrow (Thinkertoys and Morrow Microsystems). I mention those two people because I eventually bought 8-bit microcomputers designed by both of them. (Sadly, Bill Godbout perished in one of the 2018 California wildfires.)

My Senior Lab logic analyzer never worked. My portions of the project, the probe front end with variable logic levels and the memory subsystem, worked. However, my project partner did not complete their part of the project and I’m guilty of not coordinating well with my partner during the project development cycle. Nevertheless, I learned a lot about digital instrument design (and team-based design) from the project. That was back in 1975.

Just a few months later, I joined HP’s Calculator Products Division in Loveland, Colorado. When I arrived, I saw that the lab had one of HP’s earliest logic analyzers, the HP 1600A, which was basically an HP portable oscilloscope with a 16-bit digital logic analyzer’s front end. This analyzer was a visually beautiful instrument, but it was so primitive that I never had use for it.

Two years later, in 1977, I was assigned an emergency project to find the root cause of a logic glitch in the soon-to-be introduced HP 9845A desktop computer. It seemed that the machine’s I/O bus was losing data when reading from an HP 9885A external floppy disk drive. A scope was useless for this kind of debugging. The glitch was so infrequent, there was no way for me to catch the glitch with any kind of scope trigger I could imagine.

Fortunately, HP’s Colorado Springs Division – which was about 100 miles south of Loveland on I-25 – had just developed the HP 1615A logic analyzer, and it had a “trigger-on-glitch” function. We were able to borrow a production prototype, and that machine found the source of the glitch in 15 minutes. The problem was the HP 9845A’s I/O backplane. It supplied two amps at 5V to four I/O cards over a 2-layer board with small power supply traces. When a specific data pattern was transferred over the I/O card’s 16-bit parallel interface to the HP 9885A, the I/O card’s internal circuitry dragged the power supply rails down just enough to corrupt the transfer. Converting the backplane to a 6-layer board with ground and power planes and adding more bypass capacitance to the board’s 5V power plane eliminated the problem, and the HP 9845A was released to production on schedule. Without the HP 1615A logic analyzer, I would have been a goat. HP subsequently announced the HP 1615A logic analyzer in early 1978. It was a huge success, for a logic analyzer.

So, yes, I am very partial to logic analyzers, and I like Dr. Bernad’s design quite a bit. Now, if you are familiar with the Raspberry Pi Pico, you know that it’s completely different from the original Raspberry Pi, which is based on an SoC that was originally used in cell phones. The Raspberry Pi Pico is based on a custom microcontroller, the RP2040, which incorporates a dual-core Arm Cortex-M0+ processor running at a maximum clock rate of 133 MHz. Given those two Arm Cortex-M0+ processors and that clock rate, there’s no way to implement a 100Msamples/sec logic analyzer with trigger logic in software on that kind of system. Instead, Dr. Bernad harnessed the power of the two PIO (programmable I/O) engines designed into the device.

Each PIO engine contains four software-controlled state machines that share a 32-entry instruction memory. The PIOs recognize just nine different instructions,and each instruction executes in one cycle. The PIO state machines can run as fast as the Raspberry Pi Pico’s system clock. Even these PIO state machines are not capable of sampling at 100 Msamples/sec with trigger conditions, but gang all eight together with some imaginative hackery, and you have a logic analyzer.

The analyzer has three trigger types: edge, fast pattern, and complex pattern. The edge trigger program requires just two instructions and runs on just one of the Raspberry Pi Pico’s eight state machines, which allows eight such triggers to run in parallel at the full 100Msps sampling rate. The complex trigger requires the use of two state machines and runs more slowly. The fast trigger overcomes the limitations of the PIO units with a “clever hack” (documented on GitHub) and can run at 100Msamples/sec across as many as five channels. Dr. Bernad has already implemented an SPI protocol analyzer for the logic analyzer and plans to implement additional protocol analyzers for I2C and RS-232, and system bus analyzers for old computers with sixteen address bits and eight 8 data bits.

Based on what Dr. Bernad has managed to do with these PIO engines in the Raspberry Pi Pico, I suspect that there’s far more that can be done with these resources. Those exciting applications are just waiting to be discovered.

Of course, a $4 logic analyzer must have limitations. Dr. Bernad’s analyzer based on the Raspberry Pi Pico is limited to 3.3V logic levels, because that’s all the RP2040 microcontroller can handle. However, the resourceful Dr. Bernad has designed a pair of boards to shift the logic levels with on-board voltage translators. One board is a carrier for the Raspberry Pi Pico, and the other board carries the level translators and is designed to plug directly into the Raspberry Pi Pico’s I/O pins.

Like any self-respecting, cheapo logic analyzer these days, Dr. Bernad’s analyzer uses a PC for its user interface. Dr. Bernad developed his own GUI for the logic analyzer, explaining that it’s easier for him to develop his own Windows-based GUI than it is to use a 3rd-party GUI framework. I get this sense that Dr. Bernad is a real individualist. We need more people like him in the industry.


For more information about Dr. Bernad’s logic analyzer based on the Raspberry Pi Pico, click here.

One thought on “$4 Logic Analyzer Based on Raspberry Pi Pico”

Leave a Reply

featured blogs
Jun 6, 2023
Learn about our PVT Monitor IP, a key component of our SLM chip monitoring solutions, which successfully taped out on TSMC's N5 and N3E processes. The post Synopsys Tapes Out SLM PVT Monitor IP on TSMC N5 and N3E Processes appeared first on New Horizons for Chip Design....
Jun 6, 2023
At this year's DesignCon, Meta held a session on '˜PowerTree-Based PDN Analysis, Correlation, and Signoff for MR/AR Systems.' Presented by Kundan Chand and Grace Yu from Meta, they talked about power integrity (PI) analysis using Sigrity Aurora and Power Integrity tools such...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....

featured video

Shift-left with Power Emulation Using Real Workloads

Sponsored by Synopsys

Increasing software content and larger chips are demanding pre-silicon power for real-life workloads. Synopsys profile, analyze, and signoff emulation power steps to identify and analyze interesting stimulus from seconds of silicon runtime are discussed.

Learn more about Synopsys’ Energy-Efficient SoCs Solutions

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

Flexible Development with the PSoC 62S2 Evaluation Kit
Sponsored by Mouser Electronics and Infineon
In order to get a successful IoT design launched today, we need a robust toolbox of cloud connectivity solutions, sensor interfaces, radio modules, and more. In this episode of Chalk Talk, Amelia Dalton and Paul Wiegele from Infineon investigate the PSoC™ 62S2 Evaluation Kit from Infineon. They take a closer look at the key features included in this kit and how it can help jumpstart your next IoT design.
Nov 11, 2022