Xilinx® FPGAs offer up to 2 million logic cells incapacity—and they continue to grow. Designs of thiscomplexity usually require a team of developers, and often, a team leader, who is responsible for the synthesis and implementation of the entire design.To  make  matters  more  challenging,  the  developers can be located internationally, with different portions of the design developed in different locations, and even by different companies. The Xilinx Team Design flow introduced in ISE® DesignSuite 13.1 focuses on solving these challenges.