feature article
Subscribe Now

Packing Them In

A Look at High-Density PC – er – PWBs and Persecution of Solder

The world of PC boards – or, as they seem to be more widely called in the official literature, “printed wiring boards” or PWBs – has been a conservative one. For the most part, things are still done today like they were a few decades ago. Sure, dimensions have gone down, and we can do many, many more layers, and we can put passives on the back side, but, except for the bleeding edge, we pretty much do things the old-fashioned way: etch metal off of a board made out of some kind of resinous material, glue several of those together if needed, poke parts through the holes or stick them onto pads, and run the whole thing through a wave-soldering line. Some wires (particularly, white ones) may even be soldered by hand.

But at the far extremes of PWB technology, very new and different things are being tried and proposed, not all of which are warmly welcomed by a well-entrenched PWB infrastructure. I became aware of this at an isQED session where Joseph Fjelstad, of start-up Verdant, did a presentation on the need to provide higher gadget reliability for the billions of people in the developing world that may need modern electronic devices like phones, but who can’t afford to get a new one every year. And solder is one of the main contributors to field failures over time, especially in the new lead-free world. Simply put, Joe is on a mission to get rid of solder.

Looking into the Verdant solder-less approach, which they call Occam technology (named, of course, after him of the famous razor), I ended up poring through information on high-density interconnect (HDI) technology. And for those who haven’t peered much into the more advanced assembly processes (and I include myself in that group), perhaps HDI is a more fitting place to start this discussion. Joe has, in fact, contributed to the IPC-2226 standard that lays out the dos and don’ts of HDI. While updates to the standard are in the offing, Occam is, at least at present, not covered.

IPC-2226 has actually been around for a while; it is dated 2003. It frankly doesn’t do much to add clarity to the various definitions of what really constitutes “HDI.” For the most part, every definition seems to be some variant on “PWBs that have denser interconnect than conventional boards.” (My paraphrasing.) I’m not sure how well that will work if HDI becomes the conventional technology…

There is one element that appears to stand out as a main character in the HDI world: the micro-via. This is a small, blind via that’s typically drilled (mechanically or with a laser) through the current outer layer of a multi-layer board. I use the word “current” because these layers are built up, so successive layers can all have micro-vias, each drilled before the next layer is applied.

The standard defines six types of board, from the simple to the exotic, although all of them are more advanced than conventional boards. The first four are relatively straightforward; the last two diverge more dramatically.

The most basic types start with a standard PWB, referred to as the “core.” It may have any number of layers, and it would be built using traditional processes. Traditional from today’s perspective, that is.  Extra layers are then built up on either side of the board, with even numbers preferred to balance out the mechanics of the extra layers. Type 1 boards have one extra layer on each side, with blind – but not buried – micro-vias. You may also have vias going all the way through the added layers and the core, from one side to the other of the completed board.

Type II boards are similar, but they permit buried vias. Since there is only one added layer on each side of the core, the only buried vias possible would be in the core itself. Those would be through-board vias as far as the core itself is concerned; they get buried by the additional layers.

Type III boards are the same, except that, instead of just one built-up layer on a side, you can have two or more (preferably keeping them balanced). This means you may also have buried micro-vias. And here you have to deal with micro-vias that need to travel more than just one layer. There are several variants on this; the following descriptions all assume that you are trying to go from one layer to two layers below, passing through one layer en route.

–        Staggered micro-vias: here one micro-via goes from the outer layer to the next layer; another micro-via goes from that layer to the desired destination layer. The two micro-vias do not line up over each other; they can be close, but they’re offset – hence the “staggered” description – and they’re connected on the middle layer.

–        Stacked micro-vias, by contrast, line up exactly over each other. This means creating two identical micro-vias in each of the layers in the same place. There is no need to run any connective wiring on the middle layer.

–        Stepped micro-vias are like stacked ones, except that the outer micro-via is larger than the inner one. The micro-vias are all sloped in, like flat conic sections, so the two together more or less extend the cone through two layers instead of just one. But the key here is that they’re created separately, one for each layer.

–        Skip micro-vias, by contrast, are simply one micro-via drilled through two layers (as opposed to two micro-vias that act as one).

Type IV boards are like one of the first three, except that the core contains a passive internal layer rather than circuit layers. This is typically done for thermal or other mechanical reasons.

Type V boards are different. These are a sandwich of small, individually-built mini-cores that get laminated together all in one step (rather than one layer at a time).

Finally, Type VI boards are kind of “out there.” They don’t use normal plating for the connections; they may use other more exotic materials, like conductive inks.

And that’s as far as HDI goes, at least as currently articulated in the spec. The Occam process has some similarities with Type VI, but it’s not really the same thing. We’re back to metal for conduction, but a board is put together in a way that doesn’t require any solder. Here’s a simplistic description of how it works:

  1. Place the chips and whatnot on some insulating base material; it could be permanent or temporary. The components are held in place by a tacky material of some sort. Tacky as in “sticky,” not as in “stylistically challenged.”
  2. Then cover these components with an insulating material to encapsulate everything and hold the components in place.
  3. Flip the entire unit over and drill holes through the original base material to expose the contacts of the components.
  4. Plate to connect the components.
  5. You can now add successive layers of insulator, drilling holes through so that a new plating layer can have access to the prior metal layer, much in the way HDI layers are built up and micro-vias drilled.

You can have multiple layers with components on them, gluing them together back-to-back, and building up on both sides. In such an arrangement, the components will actually be on the innermost layers of the board, in contrast to standard boards, where the components are on the outside. You can embed heat spreaders if necessary to keep the innards from getting too toasty.

According to Mr. Fjelstad, all of the basic processes needed to do this exist today, just not done in this particular way. There is some work required to nail down some of the specific materials, but it’s not a matter of inventing something new; it’s just optimizing the composition of known substances and the details of a few process steps.

The benefits are several, mostly relating to the elimination of solder. All solder-related steps are eliminated from the process; fewer process steps and fewer materials should mean lower cost and higher yield. It is no longer necessary to subject delicate silicon chips to the higher reflow temperatures needed for lead-free solder. Because you no longer need spreading pads where the solder would connect, you can pack the lines tighter. And, without solder, the assembled unit should be more reliable.

Sounds like it should be a no-brainer, but it appears to be challenging some vested interests. First of all, it’s not “how things are done.” There are concerns about expensive surface mount equipment and plating equipment co-habitating. And most of all, there’s an entire industry set up around solder, supplying solder and flux and equipment. A big part of this whole industry would presumably go away if the Occam process became standard. So there’s not a lot of support in that camp.

For this and other practical reasons, Occam has some hurdles to surmount. Rights to the technology are exchanging hands, and an ecosystem of technologies and equipment is being assembled. Prototypes have been built, but obviously such a new technology will have to prove itself out through rigorous reliability testing once the remaining details in the process have been sorted out. And funding is needed to drive all of that activity.

Admittedly, this is one side of the discussion. There are a number of elements to this whole concept that range from controversial to heretical, and I haven’t explored all angles of all aspects of the debate. You might think that Mr. Fjelstad is just some lone oddball out of step with the industry, but he seems to have a solid pedigree within the packaging and assembly industry, so it’s not like he’s some clueless outsider.

Caveats notwithstanding, it’s hard to deny the appeal of an approach that, at first blush, seems to have nothing but advantages going for it.


More info:

IPC 2226 (costs $77)


Leave a Reply

featured blogs
Oct 23, 2020
Processing a component onto a PCB used to be fairly straightforward. Through-hole products, or a single or double row surface mount with a larger centerline rarely offer unique challenges obtaining a proper solder joint. However, as electronics continue to get smaller and con...
Oct 23, 2020
[From the last episode: We noted that some inventions, like in-memory compute, aren'€™t intuitive, being driven instead by the math.] We have one more addition to add to our in-memory compute system. Remember that, when we use a regular memory, what goes in is an address '...
Oct 23, 2020
Any suggestions for a 4x4 keypad in which the keys aren'€™t wobbly and you don'€™t have to strike a key dead center for it to make contact?...
Oct 23, 2020
At 11:10am Korean time this morning, Cadence's Elias Fallon delivered one of the keynotes at ISOCC (International System On Chip Conference). It was titled EDA and Machine Learning: The Next Leap... [[ Click on the title to access the full blog on the Cadence Community ...

featured video

Demo: Inuitive NU4000 SoC with ARC EV Processor Running SLAM and CNN

Sponsored by Synopsys

Autonomous vehicles, robotics, augmented and virtual reality all require simultaneous localization and mapping (SLAM) to build a map of the surroundings. Combining SLAM with a neural network engine adds intelligence, allowing the system to identify objects and make decisions. In this demo, Synopsys ARC EV processor’s vision engine (VPU) accelerates KudanSLAM algorithms by up to 40% while running object detection on its CNN engine.

Click here for more information about DesignWare ARC EV Processors for Embedded Vision

featured paper

Fundamentals of Precision ADC Noise Analysis

Sponsored by Texas Instruments

Build your knowledge of noise performance with high-resolution delta-sigma ADCs. This e-book covers types of ADC noise, how other components contribute noise to the system, and how these noise sources interact with each other.

Click here to download the whitepaper

Featured Chalk Talk

High-Performance Motor Control Solutions Through Integration

Sponsored by Mouser Electronics and Qorvo

Brushless motors have taken over the market for a huge number of applications these days. But, it’s easy to blow up your BOM cost with all the motor control and power management components required. In this episode of Chalk Talk, Amelia Dalton chats with Marc Sousa of Qorvo about the Power Application Controller (PAC) that can lower your BOM, trim down your component list, and give you several other benefits as well.

Click here for more information about Qorvo Power Application Controllers®