feature article
Subscribe Now

Synopsys Awarded TSMC’s ‘Interface IP Partner of the Year’

MOUNTAIN VIEW, Calif., Oct. 21 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing today announced that it received TSMC’s inaugural “Interface IP Partner of the Year Award.” The award recognizes Synopsys’ superior performance in the TSMC IP Alliance. Synopsys was selected based on customer feedback, TSMC-9000 compliance, technical support excellence and customer IP usage. Synopsys’ DesignWare® interface IP portfolio consists of widely used protocols such as USBDDRPCI Express®HDMIMIPISATA and Ethernet.

“Synopsys was selected because they have consistently produced high quality interface IP products across a broad spectrum of TSMC process nodes,” said Suk Lee, director of the Design Infrastructure Marketing at TSMC. “We look forward to continuing our collaboration with Synopsys.”

“It is gratifying to see Synopsys’ investment in quality and customer support being recognized, and we are honored that TSMC has selected us as the inaugural recipient of this award,” said John Koeter, vice president of marketing for the Solutions Group at Synopsys. “We have delivered more than 150 different DesignWare IP products that have been silicon-proven in TSMC processes. Our collaboration ensures that designers have access to a broad range of proven IP solutions that enable them to reduce integration risk and accelerate their time to volume production.”

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare® IP portfolio includes complete interface IP solutions consisting of controllers, PHY and Verification IP for widely used protocols, analog IP,embedded memorieslogic libraries and configurable cores.  In addition, Synopsys offers SystemC transaction-level models to build virtual prototypes for rapid, pre-silicon development of software. With a robust IP development methodology, reuse tools, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter athttp://twitter.com/designware_ip.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

Leave a Reply

featured blogs
May 6, 2026
Hollywood has struck gold with The Lord of the Rings and Dune'”so which sci-fi and fantasy books should filmmakers tackle next?...

featured paper

Quickly and accurately identify inter-domain leakage issues in IC designs

Sponsored by Siemens Digital Industries Software

Power domain leakage is a major IC reliability issue, often missed by traditional tools. This white paper describes challenges of identifying leakage, types of false results, and presents Siemens EDA’s Insight Analyzer. The tool proactively finds true leakage paths, filters out false positives, and helps circuit designers quickly fix risks—enabling more robust, reliable chip designs. With detailed, context-aware analysis, designers save time and improve silicon quality.

Click to read more

featured chalk talk

Designing Scalable IoT Mesh Networks with Digi XBee® for Wi-SUN
Sponsored by Mouser Electronics and Digi and Silicon Labs
In this episode of Chalk Talk, Quinn Jones from Digi, Chad Steider from Silicon Labs and Amelia Dalton explore how Wi-SUN Micro-Mesh can reduce cost and simplify deployment for your next IoT mesh network. They also investigate the benefits that Digi XBee solutions bring to these types of networks and how you can jump start your next IoT mesh network design with Silicon Labs and Digi.
May 4, 2026
2,288 views