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Cortex M0 or BMW M3?

I’d rather have a full bottle in front of me than a full frontal lobotomy. That’s a great plan, unless you’re in the embedded processor business. Down here, you need to shave a little off the frontal lobe from time to time. Even shrink the cortex, you might say.

NXP Semiconductors has a new chip out that lowers the bar for 32-bit microcontrollers. It’s a cute little device that just barely fits into the 32-bit category. In fact, it’s more like a 16-bitter with an 8-bit price tag.

A few years ago, a company called Luminary Micro made headlines with its “32 Bits for a Buck” offer. The company (now part of Texas Instruments) was the first to offer an ARM Cortex-M3 processor for dirt cheap. Now NXP has gone that deal one better. The new LPC1100 chip costs just $0.66 in reasonable quantities. So that makes NXP one-third better than TI, right?

Well, yes and no. The Luminary/TI chip is based on ARM’s Cortex-M3 processor, while NXP’s is based on the less-potent M0. It’s still a darn good deal, but it’s for a less-capable part.

If you don’t have your handy ARM nomenclature cheat sheet handy, let’s refresh your memory. The Cortex-M0 is the absolute bottom-of-the-line ARM processor. It’s the smallest, slowest, dumbest, and least-capable processor you can buy and still call it an ARM processor. That’s the way ARM likes it; the M0 is designed to be a high-end microcontroller, not a low-end microprocessor. Think of it as an 8051 or Microchip PIC dragged into the 21st century.

Good Things, Small Packages

Before we focus on the details of NXP’s LPC1100 chip, let’s look at the processor in the center of this little jewel. Look closely, because it’s small. How small? ARM says it’s about 12,000 gates, but who really cares? Buying processors by the gate is like buying cars by the pound. Even if you’re licensing the IP to include in your own chips, the gate count is trivial. The M0’s silicon area is also irrelevant; even a modest cache or a pair of UARTs would take up more space than the processor core. In essence, the M0 is free, at least in terms of real estate.

The M0 is unique among ARM processors because it runs only the Thumb instruction set. That’s a change from older chips like the ARM7 and ARM9, which ran Thumb code in addition to their usual 32-bit instruction sets. It’s also different from ARM’s Cortex M-series and R-series processors that use the newer Thumb-2 instruction set. The M0 runs Thumb code and only Thumb code.

That’s both good and bad. First, the bad news. The M0 isn’t binary compatible with other ARM processors, for the reasons just mentioned. Unlike your old ARM7TDMI (for example), the M0 can’t switch between Thumb mode and “normal” mode. There is no “normal” mode on the M0; it’s in Thumb mode all the time, so it can’t reuse any 32-bit software you’ve already developed for other ARM processors.

Paradoxically, you might not be able to use your existing Thumb code, either. Before the M0, Thumb wasn’t a standalone instruction set; it was an add-on to a 32-bit instruction set that you could use to opportunistically compress bits of code here and there. There were plenty of things you couldn’t do in Thumb mode, like set up peripherals, for example, or boot your system. Those tasks had to be done with 32-bit code. Now that the M0 allows (indeed, requires) you to perform these tasks in Thumb mode, you’ll have to rewrite those portions of your software.

Oh, and Thumb isn’t compatible with Thumb-2, either. Thumb-2 is ARM’s official do-over — a different 16-bit instruction set that fixes the shortcomings of the original Thumb. Now that Thumb-2 is a standard feature on most Cortex processors, Thumb is orphaned.

Finally, Thumb code is slower than Thumb-2 code. It’s also slower than 32-bit ARM code. That’s mostly because Thumb has a very limited instruction set, so you sometimes have to take the long way around, using a dozen short instructions where a couple of more powerful ones would have worked better. That’s the price you pay for code compression.  By the way, this pleases ARM’s marketing department because it conveniently banishes the M0 to the bottom of ARM’s performance spectrum, where it won’t compete with higher-priced processors.

Now for the good news. Thumb code is dense. That’s the whole point, of course. Now that you can run the M0 entirely in Thumb mode, you’ll get code that’s maybe one-third smaller than if you’d compiled it for ARM’s normal 32-bit instruction set. That’s pretty good, but remember that code compression affects only your code. Thumb won’t compress data, stack, or literals at all. If most of your memory is taken up by software, you’re in clover. But if most of your ROM is full of constants and tables, you won’t see much difference.

The M0 isn’t the only processor to implement the Thumb instruction set, just the only one to rely on it exclusively. So if you’ve got experience with Thumb from another project, you’ll have a leg up. And since Thumb mode still exists on many of ARM’s low- to mid-range chips, there’s some hope that you’ll be able to upgrade from the M0 in future. Just don’t expect the binaries to drop in without some tweaking.

Wrapping It Up

NXP is rolling out several versions of the LPC1100. (You knew they would, didn’t you?) There are four memory sizes so far, including chips with 8, 16, 24, or 32 KB of ROM. Huh – 24KB? What’s with the nonlinear, power-of-two thing? NXP figures that customers switching from 8-bit or 16-bit chips might see their code shrink a bit on the LPC1100, perhaps even enough to downgrade from 32KB to 24KB (but probably not enough to fit in 16KB).

The processor runs at 50 MHz – or at least, it can run at 50 MHz. You can certainly run it slower if you like. The chip even has its own internal RC oscillator, so, if you’re not picky about exact frequencies, you can let it pace itself.  There’s also a UART, a pair of I2C and SPI ports, a couple of timers, and even a 10-bit DAC. Leftover pins on the package become general-purpose I/O. Not bad for two-thirds of a dollar.

The LPC1100 is a good chip for NXP, and the Cortex-M0 is a good strategic move for ARM. The LPC1100 allows the Dutch company to keep satisfying customers for high-volume, low-cost microcontrollers as it has done for decades (first as Philips Semiconductor and now as NXP). And the M0 allows ARM to reach into new low-end markets that it didn’t previously touch. Now that ARM mostly dominates the embedded 32-bit market, there’s nowhere for the company to go but down. Encroaching into the 8-bit and 16-bit world was the only avenue for growth. Simply lowering the price of its 32-bit chip family (even if it could) is less attractive than creating a whole new low-cost family. The M0 pries open new markets for ARM and, in the process, gives companies like NXP an interesting new processor core that the rest of us can buy for pennies. Sign me up.

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