The age of mainstream 40nm FPGAs has now arrived.
Last May, Altera announced the first-ever 40nm FPGA family – Stratix IV. Last quarter, that announcement became a practical reality as the company began shipping Stratix IV devices to customers. Last week, in dueling announcements, Altera announced their second wave of Stratix IV devices, while Xilinx rolled out their new Virtex-6 and Spartan-6 families. Across all of these announcements, one thing is clear. The race for supremacy in the 40/45nm process node for FPGAs focuses on the proliferation of high-speed serial I/O.
In their latest announcement, Altera has beefed up their Stratix IV family with a new “Stratix IV GT” line and introduced a new generation of their low-cost SerDes-havin’ Arria family with the new “Arria II GX.” With this latest round of announcements, we can see that the old days of the Swiss-Army-Knife-style transceivers is gone. FPGA companies are now far more sophisticated, producing an array of transceivers optimized for various speeds, protocols, and power profiles. Altera already had high-speed serial transceivers in their 40nm line, but this recent announcement broadens the portfolio considerably.
The previously-announced Stratix IV has a “GX” version with up to 48 multi-gigabit transceivers running at up to 8.5 Gbps. Now, Altera has added a new “GT” family with transceivers that operate at up to 11.3 Gbps. The largest device sports 24 11.3 Gbps transceivers plus an additional 24 6.5 Gbps transceivers. The family is aimed squarely at the communication infrastructure market, where 40G and 100G Ethernet will soon mature into mainstream standards. During that maturation phase, FPGAs will, as usual, play a pivotal role in deployment, allowing designers to create systems that can be deployed early and then evolve in the field as standards and requirements remain in flux.
The bandwidth deficit we face now is probably the greatest we’ve seen since the turn-of-the-century infrastructure build-out. Billions of mobile devices are suddenly connecting to the internet, bringing with them the demand for high-bandwidth for applications like streaming video. The resulting simultaneous exponential increase in both the number of connected nodes and the bandwidth demand of each node has resulted in an enormous pull for increased infrastructure capacity – notably, from end-use devices already deployed and in service. Altera has analyzed these systems and has come up with FPGA architectures that support specific tasks within those applications. The balance of high-speed and medium-speed transceivers allows bridging between standards, as high-bandwidth pipes are split apart and connected to switching fabrics. By mixing transceivers with very high bandwidth on one side with lower-power, lower-speed transceivers on the other side, we get the benefits of both worlds in a single application and gain additional opportunities for integration.
Altera’s new Stratix IV GT devices provide the additional speed required by these markets along with the internal capacity to process the data effectively. Although they were designed specifically to meet the needs of communications infrastructure, they will obviously find happy homes in a number of industries with growing bandwidth requirements. In addition to the aforementioned transceivers, Stratix IV GT offers up to 530K LEs – marketing-speak for 4-input look-up table (LUT) equivalents, delivered as 212,480 actual Adaptive Logic Modules (ALMs), which are something like a reconfigurable 6-input LUT. The devices also carry up to 21 Mbits of internal RAM – 11.8 Mbits in 9K blocks and 9.4 Mbits in 144K blocks, plus some additional you can create from LUT fabric, if you weren’t using it already. Up to 1024 embedded 18X18 multipliers give a boost to signal processing components such as crest factor reduction – common to these designs.
Not all applications fit the mold of high-end FPGAs, however. There is an increasing need for programmable devices that serve lower-cost applications with high-speed serial transceivers. Lattice Semiconductor was the first to launch low-cost FPGAs with SerDes, about two years ago, with their ECP2M family. Since then, other players have jumped on the bandwagon. Altera followed Lattice with their Arria family, and Xilinx only recently joined the party with their newly-announced Spartan-6 LXT family. Now, Altera has become the first company to move onto a second generation of low-cost devices with transceivers, announcing Arria II GX.
Arria II GX uses lower-speed, lower-power, lower-cost transceivers – aiming at markets that are more cost- and power-sensitive. Altera is going aggressively after applications in the wireless, wireline, broadcast, and military areas with these devices. Arria II GX boasts up to 16 transceivers, each operating at up to 3.75 Gbps. It includes dedicated circuitry to support popular protocols like PCIe, Gigabit Ethernet, Serial RapidIO, CPRI, OBSAI, SD/HD/3G SDI, XAUI, HiGig/HiGig+, and SONET/SDH. Rather than optimizing for speed, as in the Stratix IV lines, Altera has pushed hard on reducing power consumption in these devices, working to satisfy applications like remote radio heads, where power and cost are primary concerns. In these applications, a single Arria II GX can integrate a large number of functions, reducing the BOM, cutting power consumption, and improving reliability and in-field upgrade capability.
In addition to the transceivers, Altera has included up to 736 embedded 18X18 multipliers and a generous 8.5 Mbits of block RAM – critical for buffering and fast temporary storage in target applications. These devices also share the ALM (wider LUT structure) architecture with the Stratix IV family – acknowledging that transceivers are only the top of the pyramid, and that satisfying the needs of high-speed applications requires an array of capabilities, including fabric, memory, and DSP features. These low-cost devices rival or exceed the high-end FPGAs of just a generation or so ago, blurring the lines between high-end and low-end FPGAs even farther.
Since the FPGAs in both of these families share common architectures in fabric and transceiver design, the tools for designing with them are also common. Altera already has tool support for both families in their Quartus II version 9.0 software. Stratix IV GT is already shipping, and Arria II GX will begin shipping in May. This represents a significant departure from the norm in FPGA announcements, as most companies (including Altera) usually announce families far in advance.
With the flurry of new device announcements hitting us early this year, the FPGA battle really seems to be heating up. These additions to Altera’s portfolio clearly add to a lead they’ve accrued shipping devices at the latest process node. Rival Xilinx has stepped up their game now as well, and other FPGA companies are definitely not giving up the fight either. All of this advanced capability promises to give a much-needed boost to us in the design community, at a time when the global economy has us engaging in the design work that will lead our companies out of the downturn in a more competitive position.
