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New Kid in Class

SiliconBlue Debuts Low-Power FPGAs

There’s a new kid in class.

We’ve all been through this scenario before.  All the players are comfortable in their established roles.  The leader tries to stay ahead and always communicates with the purpose of maintaining the perception of leadership.  The second player vies constantly with the leader for supremacy and mind-share, always trying to one-up the alpha dog.  The third through fifth players are constantly flanking, trying to differentiate and establish themselves based on supremacy in a particular niche.

For years now, Xilinx, Altera, Lattice, Actel, and QuickLogic have tried, taunted, and tested each other in the programmable logic market.  One could almost model it with Bruce Tuckman’s 1965 Forming – Storming – Norming – Performing model for describing the stages of group development.  For the past few years, the FPGA class has been Performing.  Now, a new kid just walks in and sits down.  Everybody has to re-think and re-group.  SiliconBlue is here.

A new FPGA company making it to the “announcement” stage is a rare event indeed.  Sure, we’re always tracking a number of “stealth mode” startups who are developing FPGAs or FPGA-like technology.  Usually, these companies begin, live and end in stealth mode without ever shipping devices in volume.  Starting a new FPGA company is a daunting and complex task.  It requires far more than just an innovative silicon architecture or novel tool idea.  The FPGA business is mature and tough.  Companies have to compete on multiple fronts, including tools, silicon architecture, application engineers, distribution, IP, design kits, reference designs, marketing, and much more.

SiliconBlue is different, however.  For starters, they have a seasoned management team made up of programmable logic industry veterans.  They know where they can add value and differentiate themselves, and they know where to surf the existing ecosystem of tools and technology to get to market without re-inventing too many wheels.  The areas they’ve targeted for differentiation are key in many of the emerging growth markets for FPGAs.  Intrigued?  Let’s take a closer look.

SiliconBlue is announcing a family of low-cost, low-power, non-volatile, 65nm FPGAs dubbed iCE.  The iCE family has four members ranging from 2K to 16K logic cells (a logic cell, in this case, being a 4-input look-up table or LUT) and 128 to 384 user I/O.  For comparison purposes, the closest match would be the 90nm Xilinx Spartan-3E family, which ranges from 2K to about 33K logic cells  and 108 to 376 user I/O (the overall Spartan-3 line ranges from 1.5K to 74K logic cells and 108 to 633 user I/O).  Altera’s 65nm Cyclone III family ranges from 5K to 120K logic cells and 182 to 531 user I/O.  The density comparison makes it clear that SilconBlue’s iCE is focused on the small and inexpensive end of the low-cost FPGA range.

When you put a small-ish FPGA on a big 300mm wafer using 65nm process technology, lots of good things happen.  First, the die are tiny.  Tiny die mean low cost, of course, because you get more die on a wafer and, thanks to the magic of probability, higher yield.  This should make SiliconBlue’s iCE devices very inexpensive indeed.  A cheap FPGA isn’t the only factor in low system cost, however.  FPGAs usually bring along some extra cost and complexity due to external configuration logic like flash memory. 

SiliconBlue has created a unique solution to configuration by using what they call non-volatile configuration memory (NVCM).  NVCM is one-time programmable non-volatile memory based on technology the company acquired from Kilopass.  iCE devices include enough on-chip NVCM to support multiple configurations of the LUT fabric, so the device can be operated as a non-volatile, single-chip, multiple-configuration FPGA in production mode, but still configured unlimited times externally for easy development and debug. 

This on-chip configuration memory is most similar, perhaps, to the architecture employed by Lattice on their 90nm XP2 devices, or by Altera on their “pretending to be a CPLD” Max II family.  Those lines both use on-chip flash to configure SRAM-based LUT fabric.  By using NVCM, however, SiliconBlue avoids the additional complexity that flash brings to the semiconductor process, allowing them to stick with standard CMOS process recipes.  Usually, flash-based devices lag standard CMOS by a process node or two.

The LUT fabric itself looks like a standard 4-input LUT SRAM FPGA, except SiliconBlue has pushed all the trade-off buttons in the “low power” direction.  Since about 90nm, each new process node has required designers to make trade-offs, particularly between speed and power.  SiliconBlue reasoned that the low-power TSMC 65nm process that they’re targeting provided plenty of performance for most mobile and handheld applications – even with the compromise hard over on the power-conserving side.  Also, rather than providing the usual “stand-by” mode, the company worked to keep total operating power low in “fast” (MHz) and “slow” (KHz) modes.  This allows the devices to be used for many applications where low-frequency “heartbeat” modes are used rather than a power-off “standby” mode.  By aiming for small, single-chip devices with absolute minimal power consumption, they created a viable contender for battery-powered mobile device sockets.

The company claims operating current in “slow” mode can be as low as 25µW at 32KHz, and 9mW at 32MHz “fast” mode (estimates for a 3.5K logic cell design).  These numbers are significantly lower than those of other SRAM-based FPGAs operating at similar frequencies for similar densities.

Certainly the most direct competition for SiliconBlue will be Actel’s low-power flash-based Igloo, IglooPlus, ProASIC3 , and ProASIC3L lines.  Both companies now offer devices with much lower power consumption than standard FPGAs, in tiny form-factors, with non-volatile, single-chip operation, and at very low price points.  Actel achieves this with a unique flash-based FPGA technology, while SiliconBlue’s new entry is based on a more conventional SRAM LUT fabric on leading-edge low-power CMOS process with the company’s proprietary NVCM non-volatile, on-chip configuration memory. 

On the design tool side, SiliconBlue has partnered with Magma Design Automation for their front-end and physical synthesis tools, while the company provides its own back-end tools.  Magma has been somewhat quiet on the FPGA front for the past few years, since acquiring A-Plus design technologies and integrating their Palace synthesis technology into the company’s Blast FPGA product. 

SiliconBlue says one member of the family (iCE65L04) is sampling now, and development kits and software are available.  Other family members are slated for introduction through the rest of 2008 and Q1 2009.  Devices are available in packages ranging from a tiny CS80 3X4mm .4mm pitch BGA to a CB284 12X12mm .5mm pitch.  The company also claims that the architecture scales to the 40nm process node and beyond and is already showing a roadmap for introduction of 40nm devices in 2009-2010. 

SiliconBlue seems well poised to jump into the fray as the first truly new FPGA company in about a decade.  What remains to be seen, of course, is how the company will execute their strategy, with the competitive pressures, customer demands, and growing pains that are sure to follow.  Given the company’s impressive progress so far, it will be fun to watch.

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