editor's blog
Subscribe Now

For the reason’s posted under “I

For the reason’s posted under “Intel Plus Altera
What Would it Mean?” … Intel simply doesn’t need Altera, or Xilinx IP.

Everything that is important they will need to engineer themselves anyway, and that isn’t very much. A co-processor FPGA fabric is a very very different beast than today’s Altera and Xilinx FPGA’s.

Done right, and Intel will redefine computing … and implemented from XEON’s to Atom SOC offerings, so that Xilinx and Altera will spend the next decade playing catchup. Game over.

And with it, new important boundaries for both Amdahl’s Law, and Moore’s Law.

Leave a Reply

featured blogs
Mar 26, 2019
Many industrial electronics OEM designers use the word “rugged” to describe their board-level interconnect needs. While rugged can mean different things to different people, it usually includes the ability to withstand high shock and vibration applications, mainta...
Mar 26, 2019
It's CDNLive! Well, not today, Tuesday and Wednesday, April 2nd and 3rd at the Santa Clara Convention Center. So I have eight things you can do to get the most out of CDNLive and go home with a... [[ Click on the title to access the full blog on the Cadence Community si...
Mar 25, 2019
Do you ever use the same constraint templates in multiple projects? Now, with PADS Professional VX.2.5, you can easily import and export constraints from one project to the next. Constraint templates enable application of complex rules to multiple nets. They help ensure a smo...
Jan 25, 2019
Let'€™s face it: We'€™re addicted to SRAM. It'€™s big, it'€™s power-hungry, but it'€™s fast. And no matter how much we complain about it, we still use it. Because we don'€™t have anything better in the mainstream yet. We'€™ve looked at attempts to improve conven...