editor's blog
Subscribe Now

Atmel Gives SIGFOX a Transmitter

You may recall that, some months ago, we wrote about SIGFOX. As a quick review, SIGFOX is installing a completely new cellular system optimized for low-data-rate IoT sensors rather than for voice and Youtube. As a French company, they started the build-out in their European neighborhood, but they are supposedly starting their North American build-out now.

Of course, for this to be successful, you have to have devices that can talk to the network. And if the designers of those devices have to cobble together their own discrete circuits or – worse yet – design their own custom SoCs, well, that’s a pretty big barrier.

It would be so much easier if there were a merchant-market chip available that implemented the SIGFOX protocol – both PHY and stack.

And now there is: Atmel has announced the ATA8520 transmitter – the first SoC to pass SIGFOX’s qualification tests. It consists of the RF block, baseband processing, and an AVR microcontroller for executing the SIGFOX stack and other control functions. Data, as well as other control functions, is entered via an SPI port. The chip has an “OFF” mode that’s not quite off – more like a sleep mode – and reduces current to around 5 nA.

Block_diagram.png (Image courtesy Atmel)

The ATA8520 would typically be driven by a system microcontroller or processor; that processor would be freed of any of the details of SIGFOX transmission (traded off for SPI).

Now… all we need is a receiver to listen to all the news being broadcast by the transmitter…

You can read more in their announcement.

Leave a Reply

featured blogs
Apr 19, 2024
In today's rapidly evolving digital landscape, staying at the cutting edge is crucial to success. For MaxLinear, bridging the gap between firmware and hardware development has been pivotal. All of the company's products solve critical communication and high-frequency analysis...
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
Apr 18, 2024
See how Cisco accelerates library characterization and chip design with our cloud EDA tools, scaling access to SoC validation solutions and compute services.The post Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured chalk talk

Secure Authentication ICs for Disposable and Accessory Ecosystems
Sponsored by Mouser Electronics and Microchip
Secure authentication for disposable and accessory ecosystems is a critical element for many embedded systems today. In this episode of Chalk Talk, Amelia Dalton and Xavier Bignalet from Microchip discuss the benefits of Microchip’s Trust Platform design suite and how it can provide the security you need for your next embedded design. They investigate the value of symmetric authentication and asymmetric authentication and the roles that parasitic power and package size play in these kinds of designs.
Jul 21, 2023
31,415 views