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Keeping DDR Performance Fresh

DDR memory timing is tricky business. Especially with later versions of the standard, the timing for each memory on a module has to be carefully determined; there’s no such thing as just issuing a read or write to all the chips together. A further problem, however, is that the timing is subject to change based on a number of factors, including environmental conditions and wear-out.

Some companies address this by doing a power-up calibration that involves reading and writing to figure out the optimal timing. But things can still drift as the system warms up or the box gets moved into the sun or the environment changes for any of a number of other reasons.

Uniquify, a company whose business has morphed from ASIC design services into an IP company (with further evolution underway) has earned a patent on dynamic recalibration – the ability to keep tuning the timing during use. The prior barrier had been the fact that writing to the memory for calibration purposes is destructive. That’s not a problem at startup, before anyone has started using memory, but while the system is running, the application has control of the memory, and there is little appetite for setting a bit of it aside for use only by calibration.

Uniquify’s approach was to use application memory, but copy and store the current contents of the calibration location, do the calibration, and then replace the contents so that the application never notices it missing. The timing of this recalibration can be set to coincide with refresh or at some other designer-defined interval.

The calibration looks both for drift in the timing window as well as changes to the width of that window. Each recalibration finds the edges of the window and recenters the strobe. But if the window closes, then a specific error is flagged.

You can find out more in their latest release.

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