editor's blog
Subscribe Now

Power Contributors

At the recent Si2 conference, there was an interesting presentation by IBM’s David Hathaway on what is hoped to be a better way of approaching power modeling at the technology level.

He said that power modeling can be approached differently from delay modeling. With delay, there are numerous effects that combine in complex, non-linear ways, and so a full characterization of each cell is necessary. But with power, because interpolation is risky, many more points are needed, making full characterization a really time-consuming chore.

The good news, he proposed, is that the elements contributing to power can be separated out as more or less orthogonal to each other. Specific power contributors can be isolated, and then each cell can be defined in terms of its contributors. Only the contributors have to be characterized (tens of tests rather than hundreds), and then they can be summed cell by cell.

In an experiment to test this theory out, they compared the calculated value with full-up actual values. 95% of the simulations that would have normally been needed were eliminated, and the average error was 0.073%, with the worst-case error being 3.64%.

There’s more work to be done both at the dynamic and leakage level, but it felt like there’s some promise to this approach, with the potential of making it easier to create new technology models.

Leave a Reply

featured blogs
Dec 2, 2022
A picture tells more than a thousand words, so here are some pictures of CadenceLIVE Europe 2023 Academic and Entrepreneur Tracks to tell a story. After two years of absence, finally the Academic Dinner could take place with professors from Lead Institutions and Program Chair...
Nov 30, 2022
By Chris Clark, Senior Manager, Synopsys Automotive Group The post How Software-Defined Vehicles Expand the Automotive Revenue Stream appeared first on From Silicon To Software....
Nov 30, 2022
By Joe Davis Sponsored by France's ElectroniqueS magazine, the Electrons d'Or Award program identifies the most innovative products of the… ...
Nov 18, 2022
This bodacious beauty is better equipped than my car, with 360-degree collision avoidance sensors, party lights, and a backup camera, to name but a few....

featured video

Maximizing Power Savings During Chip Implementation with Dynamic Refresh of Vectors

Sponsored by Synopsys

Drive power optimization with actual workloads and continually refresh vectors at each step of chip implementation for maximum power savings.

Learn more about Energy-Efficient SoC Solutions

featured paper

Algorithm Verification with FPGAs and ASICs

Sponsored by MathWorks

Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers. This eBook explores different aspects of hardware design verification and how you can use MATLAB and Simulink to reduce development effort and improve the quality of end products.

Click here to read more

featured chalk talk

Current Sense Resistor - WFC & WFCP Series

Sponsored by Mouser Electronics and Vishay

If you are working on a telecom, consumer or industrial design, current sense resistors can give you a great way to detect and convert current to voltage. In this episode of Chalk Talk, Amelia Dalton chats with Clinton Stiffler from Vishay about the what, where and how of Vishay’s WFC and WFCP current sense resistors. They investigate how these current sense resistors are constructed, how the flip-chip design of these current sense resistors reduces TCR compared to other chip resistors, and how you can get started using a Vishay current sense resistor in your next design.

Click here for more information about Vishay / Dale WFC/WFCP Metal Foil Current Sense Resistors