Digital and custom (mostly meaning analog) design domains have remained stubbornly separate for a long time. It used to make sense: digital flows were used for logic chips; custom flows were used either for hand-crafted processors, for highly-repetitive circuits like FPGAs and memories, or for analog chips. You designed an entire chip with one flow, so the fact that there were two domains didn’t matter.

The difference in flows more or less comes down to one word: synthesis. Logic can be synthesized and auto-placed and routed; custom circuits can’t. Or, by design, aren’t.

But chips aren’t so neatly segregated now. Analog chips now need digital control. Large SoC chips need analog content. But the two flows don’t really work together well. You end up having to do two partial designs and then go back and forth importing and exporting data. Problem is, in addition to the basic design data, there is lots of metadata: constraints and manual edits to placement and routing. These tend to get lost in the transfer.

So Synopsys recently announced an improvement to this process. It provides for a seamless, lossless transfer of information back and forth between domains. That ensures that all the metadata is included in the import/exports.

What it doesn’t do is combine the domains into one. Synopsys says that the two design styles are different enough to warrant different optimized databases. (Something tells me that, given demand, it would be possible to design an optimized combined database schema, although it might be a lot of work to create and migrate…)

But here’s what I think the real issue is: the digital side is on a proprietary database – useful for keeping customers in the Synopsys camp. The custom side is in an open database: useful for peeling away Cadence users. It will probably take more than ease-of-use to trump those strategic goals…

More info in their press release…