editor's blog
Subscribe Now

The Other KBP

We looked today at Netlogic’s NETL7 “knowledge-based processors” (KBPs). But the KBP category contains more than just this family: it also contains one called Sahasra.

But the Sahasra products aren’t just more of the same of what’s in NETL7. NETL7 deals with packets all the way to the application layer (layer 7) in the OSI stack. That’s the essence of deep packet inspection (DPI): you’re not just looking at various enclosing headers, you’re diving all the way in. That’s equivalent to moving all the way up the stack to the original application payload.

By contrast, the Sahasra products only deal with layers 2-4. These are fundamentally for packet and flow routing. The Sahasra KBPs are intended to speed things up by implementing very specific tables or databases that are specific to a particular layer or protocol. IP routing tables are a simple example of this sort of thing.

So while the NETL7 KBPs consist of engines processing match patterns, the Sahasra KBPs essentially provide dedicated fast lookup of the kinds of things needed to route packets.

I guess they’re both “processors” that work based on some knowledge – rules in one case, route or other packet information in the other – but, aside from that, they’re different beasts.

And, quite by chance (from a coincidental timing standpoint), they just announced this week volume production of their IPv6 KBP

Leave a Reply

featured blogs
Jun 8, 2023
EdgeQ's vision is to create big connections with a small chip. They're looking to democratize 5G in an open paradigm, where their customers can access, customize, and deploy 5G purely through software. Their current mission is to accelerate cloud migration to the closest poin...
Jun 8, 2023
Learn how our EDA tools accelerate 5G SoC design for customer Viettel, who designs chips for 5G base stations and drives 5G rollout across Vietnam. The post Customer Spotlight: Viettel Accelerates Design of Its First 5G SoC with Synopsys ASIP Designer appeared first on New H...
Jun 2, 2023
I just heard something that really gave me pause for thought -- the fact that everyone experiences two forms of death (given a choice, I'd rather not experience even one)....

featured video

Automatically Generate, Budget and Optimize UPF with Synopsys Verdi UPF Architect

Sponsored by Synopsys

Learn to translate a high-level power intent from CSV to a consumable UPF across a typical ASIC design flow using Verdi UPF Architect. Power Architect can focus on the efficiency of the Power Intent instead of worrying about Syntax & UPF Semantics.

Learn more about Synopsys’ Energy-Efficient SoCs Solutions

featured paper

EC Solver Tech Brief

Sponsored by Cadence Design Systems

The Cadence® Celsius™ EC Solver supports electronics system designers in managing the most challenging thermal/electronic cooling problems quickly and accurately. By utilizing a powerful computational engine and meshing technology, designers can model and analyze the fluid flow and heat transfer of even the most complex electronic system and ensure the electronic cooling system is reliable.

Click to read more

featured chalk talk

What are the Differences Between an Integrated ADC and a Standalone ADC?
Sponsored by Mouser Electronics and Microchip
Many designs today require some form of analog to digital conversion but how you implement an ADC into your design can make a big difference when it comes to accuracy and precision. In this episode of Chalk Talk, Iman Chalabi from Microchip and Amelia Dalton investigate the benefits of both integrated ADC solutions and standalone ADCs. They discuss the roles that internal switching noise, process technology, and design complexity play when choosing the right ADC solution for your next design.
Apr 17, 2023
6,658 views