editor's blog
Subscribe Now

A Simple Brown Paper Bag

Yesterday I went to Mentor’s U2U user event. Something was missing – and it was a good thing.

We editors probably go to more events than your average engineer, but even an engineer that goes to a couple per year  must end up with a basement full of black ballistic nylon bags of various shapes and sizes with logos that ensure that his or her kids will never want to be seen in public with them. We may like the technology behind the logos, but they’re not considered “cool brands.”

I’ve actually gotten to where I decline the bags; I simply ask for the contents. Otherwise I might as well be collecting inventory to open a store. I was actually denied the opportunity to decline the bag at the recent TSMC event: the person behind the counter must have been instructed that everyone was to get a bag, and, by god, everyone was going to get one, including me.

But yesterday was different: it featured a simple brown paper bag. It’s already in the recycling bin. It will not be degrading in my garage or a landfill for the next 100,000 years. Granted, it was a smaller event than your ESC or DAC, but still, it was refreshing. It’s nice to have something to carry stuff around in during a conference – if you haven’t already brought your own (so make it optional). But it doesn’t have to last longer than the return home.

And it probably saves money too. Seems like a win-win.

(I’ll have more to say about the actual meat of the event separately.)

Leave a Reply

featured blogs
Nov 29, 2023
Cavitation poses a formidable challenge to modern boat design, especially for high-speed sailing vessels participating in events like America's Cup , Vendee Globe , and Route du Rhum . Hydrofoils, in particular, are susceptible to cavitation, which can cause surface dama...
Nov 27, 2023
Qualcomm Technologies' SVP, Durga Malladi, talks about the current benefits, challenges, use cases and regulations surrounding artificial intelligence and how AI will evolve in the near future....
Nov 27, 2023
See how we're harnessing generative AI throughout our suite of EDA tools with Synopsys.AI Copilot, the world's first GenAI capability for chip design.The post Meet Synopsys.ai Copilot, Industry's First GenAI Capability for Chip Design appeared first on Chip Design....
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

3D-IC Design Challenges and Requirements

Sponsored by Cadence Design Systems

While there is great interest in 3D-IC technology, it is still in its early phases. Standard definitions are lacking, the supply chain ecosystem is in flux, and design, analysis, verification, and test challenges need to be resolved. Read this paper to learn about design challenges, ecosystem requirements, and needed solutions. While various types of multi-die packages have been available for many years, this paper focuses on 3D integration and packaging of multiple stacked dies.

Click to read more

featured chalk talk

Shift Left with Calibre
In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality.
Nov 27, 2023
313 views