editor's blog
Subscribe Now

Go Wide

Last week Cadence announced a new wide-I/O memory controller IP block, ostensibly the first of its kind. This actually represents a risk start based on a JEDEC standard that’s not yet complete.

The idea behind the wide-I/O movement is predicated on use in 3D ICs, where a memory chip will be stacked on a logic chip, with the connections being made by TSVs. Instead of requiring higher-drive I/Os that connect to chip pads and traverse PCB traces to get to a memory chip (or back from the memory chip), you stay entirely within the package. An array of TSVs mean that you can handle far more I/Os that if you have to go to package pins. And the drive requirements are reduced tremendously, reducing both the size (due to smaller transistors) and power of the resulting combination.

Of course, with more connections, you get much higher bandwidth: this is a 512-bit interface. That’s a lot more data available in one chunk than you can traditionally get.

Cadence’s controller block includes traffic shaping algorithms to increase throughput as well as features to address power, including traffic sensing (so that power can respond to traffic) and an option for dynamic voltage and frequency scaling (DVFS).

This would seem to come well ahead of the standard, which is projected (no promises!) to be available to non-members in September. But, in many such standardization cases, the technical details are approved first, and then the resulting standard goes through a higher-level board approval step that largely examines the process by which the standard was set to make sure that it was done properly. 

Clearly Cadence is betting that there will be no further technical changes. Or that, if there are, they can update the IP before any customer commits to final silicon.

Leave a Reply

featured blogs
Sep 22, 2021
'μWaveRiders' 是ä¸ç³»åˆ—æ—¨å¨æŽ¢è®¨ Cadence AWR RF 产品的博客,按æˆæ›´æ–°ï¼Œå…¶å†…容涵盖 Cadence AWR Design Environment æ新的核心功能,专题视频ï¼...
Sep 22, 2021
3753 Cruithne is a Q-type, Aten asteroid in orbit around the Sun in 1:1 orbital resonance with the Earth, thereby making it a co-orbital object....
Sep 21, 2021
Learn how our high-performance FPGA prototyping tools enable RTL debug for chip validation teams, eliminating simulation/emulation during hardware debugging. The post High Debug Productivity Is the FPGA Prototyping Game Changer: Part 1 appeared first on From Silicon To Softw...
Aug 5, 2021
Megh Computing's Video Analytics Solution (VAS) portfolio implements a flexible and scalable video analytics pipeline consisting of the following elements: Video Ingestion Video Transformation Object Detection and Inference Video Analytics Visualization   Because Megh's ...

featured video

Silicon Lifecycle Management Paradigm Shift

Sponsored by Synopsys

An end-to-end platform solution, Silicon Lifecycle Management leverages existing, mature, world-class technologies within Synopsys. This exciting new concept will revolutionize the semiconductor industry and how we manage silicon design. For the first time, designers can look inside silicon chip devices from the moment the design is created to the point at which they end their life.

Click here to learn more about Silicon Lifecycle Management

featured paper

Configurable Input/Output Modes for PLC Systems Using the MAX22000 and MAX14914A

Sponsored by Maxim Integrated (now part of Analog Devices)

This application note features input/ components on the MAX22000 that may be used in analog input and output configuration. Circuit configurations are shown for common industrial Analog modes.

Click to read more

featured chalk talk

Complete Packaging for IIoT Devices

Sponsored by Mouser Electronics and Phoenix Contact

Industrial Internet of Things (IIoT) design brings a new level of demands to the engineering team, particularly in areas like thermal performance, reliability, and scalability. And, packaging has a key role to play. In this episode of Chalk Talk, Amelia Dalton chats with Joel Boone of Phoenix Contact about challenges and solutions in IIoT design packaging.

Click here for more information about Phoenix Contact ICS 50 Enclosure System