industry news
Subscribe Now

Cadence Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 22FDX Platform Reference Flow

SAN JOSE, Calif., November 9, 2015?Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its digital and signoff tools are now enabled for the current version of the GLOBALFOUNDRIES® 22FDX? platform reference flow. GLOBALFOUNDRIES has qualified these tools for the 22FDX reference flow to provide customers with the design flexibility of software-controlled body bias to manage power, performance and leakage needed to create next-generation chips for mainstream mobile, Internet of Things (IoT) and consumer applications. In addition, the ARM® Cortex®-A17 processor was used to validate the implementation flow with the Cadence® Innovus? Implementation System and Genus? Synthesis Solution.

Cadence collaborated with GLOBALFOUNDRIES on the development of the Process Design Kit (PDK) for the 22FDX platform. The Cadence digital implementation tools support the capability of forward and reverse body bias (FBB/RBB) to optimize the performance/power tradeoffs, implant-aware and continuous diffusion-aware placement, tap insertion and body bias network connectivity according to high voltage rules. The digital implementation tools also support double-patterning aware parasitic extraction (PEX) and design for manufacturing (DFM). Tools in the flow include:

  • ? Genus Synthesis Solution: An RTL synthesis and physical synthesis engine that improves productivity challenges faced by RTL designers, delivering up to 5X faster synthesis turnaround times
  • ? Innovus Implementation System: Advanced physical implementation tool, incorporating a massively parallel architecture that helps designers deliver high-quality SoCs in less time with best-in-class PPA
  • ? Tempus? Timing Signoff Solution: A complete timing analysis tool that improves signoff timing closure via massively parallel processing and physically aware timing optimization
  • ? Quantus? QRC Extraction Solution: A parasitic extraction tool that provides faster runtimes for single- and multi-corner extraction and best-in-class accuracy versus foundry golden

In addition, Cadence and GLOBALFOUNDRIES are actively working on the qualification of Voltus? IC Power Integrity Solution and Physical Verification System (PVS). For more information on the Cadence digital and signoff tools, please visit http://www.cadence.com/products/Pages/all_products.aspx.

“We are collaborating closely with Cadence on enabling their products to help customers realize the benefits of the GLOBALFOUNDRIES 22FDX platform,” said Pankaj Mayor, vice president of Business Development at GLOBALFOUNDRIES. “The 22FDX reference flow can enable customers to achieve real-time tradeoff between static power, dynamic power and performance to create innovative products.”

“Cadence digital and signoff customers can engage with us now to start realizing the benefits of the GLOBALFOUNDRIES 22FDX platform,” said Dr. Anirudh Devgan, senior vice president and general manager of the Digital and Signoff Group at Cadence. “Our work with GLOBALFOUNDRIES demonstrates our joint commitment to enabling customers to create innovative, next-generation SoCs that meet advanced technical requirements and aggressive market deadlines.”

GLOBALFOUNDRIES plans to deliver a related presentation at ARM TechCon titled, “The Implementation of ARM Cortex-A17 Quad-Core in GLOBALFOUNDRIES 22FDX Technology Using Cadence Innovus Implementation System.” The session is scheduled for 2:30 p.m. Pacific Time on Thursday, November 12, 2015, in the Mission City Ballroom M3 at the Santa Clara Convention Center in Santa Clara, Calif. For additional details on the session, please visit http://schedule.armtechcon.com/session/implementation-of-arm-cortex-a17-quad-core-in-globalfoundries-22fdx-technology-presented-by-cadence-design-systems.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers and research facilities around the world to serve the global electronics industry. More information about the company, its products and its services is available at http://www.cadence.com.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

Why Wiwynn Energy-Optimized Data Center IT Solutions Use Cadence Optimality Explorer

Sponsored by Cadence Design Systems

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.

Learn more about how Wiwynn is developing a new methodology for PCB designs with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

PIC® and AVR® Microcontrollers Enable Low-Power Applications
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Marc McComb from Microchip explore how Microchip’s PIC® and AVR® MCUs are a game changer when it comes to low power embedded designs. They investigate the benefits that the flexible signal routing, core independent peripherals, and Analog Peripheral Manager (APM) bring to modern embedded designs and how these microcontroller families can help you avoid a variety of pitfalls in your next design.
Jan 15, 2024
15,194 views