industry news
Subscribe Now

ASSET InterTech’s SourcePoint is first debugger to take full advantage of Intel Trace Hub

Richardson, TX (August 13, 2015) – SourcePoint™ from ASSET® InterTech (www.asset-intertech.com), the leading supplier of software and hardware debug, trace, validation and test tools, is the first debug platform to provide real insight from Intel® Trace Hub to debug the Unified Extensible Firmware Interface (UEFI) that initializes system hardware and software. 

Only SourcePoint can tap into both hardware and software sources of trace information to show engineers the exact code execution flow and system message execution information.  SourcePoint extracts information from hardware sources, including Intel Processor Trace (PT), and instrumented software to debug C code written for UEFI, the replacement for BIOS boot code. Debugging the system’s initialization process can be very time consuming due to the sheer volume of code and the interaction of that code – software-to-software and software-to-hardware – in the system.

“The key to debugging UEFI is whether the debugger can examine the boot process so the engineer can see what’s going on,” said Larry Osborn, ASSET’s SourcePoint product manager. “Currently, the only things engineers can see are LEDs, hex displays showing POST codes or console debug print output. All of these assume that certain resources in the system are functional, but, until the system boots, they’re not. SourcePoint, with Trace Hub, is able to capture potentially seconds worth of code execution – an eternity in the boot process – as well as the associated data traffic and then present this information in a human-understandable form in its trace viewer. Until SourcePoint, no other debugger has been able to do this.”

Intel recently introduced Trace Hub for debugging systems based on its sixth generation Intel® Core processors. Trace Hub captures trace data from various internal sources. This data can show the interaction between hardware and software, and the complex behaviors that result. Trace Hub  uses the Mobile Industry Processor Interface’s (MIPI) System Trace Protocol (STPv2.1) to stream the information to memory or a USB3 port for processing by third-party debugging tools. SourcePoint is the first such tool to take advantage of Trace Hub’s access to both hardware and software sources of trace information, giving engineers visibility into both UEFI code execution and various aspects of system execution like Management Engine (ME) messages during boot up. Both software and hardware sources of trace data are critical for finding the root causes of problems quickly.

The eResources section of the ASSET website (http://www.asset-intertech.com/eresources ) features a number of very informative eBooks, white papers and videos for software and hardware engineers. One eBook, “UEFI Framework Debugging,” (http://www.asset-intertech.com/eresources/uefi-framework-debugging-sourcepoint ) explains how SourcePoint can help shorten the UEFI debug process considerably. Another explains ARM’s System Trace Macrocell (STM) and describes its value. ( http://www.asset-intertech.com/eresources/debug-and-trace-using-arm-system-trace-macrocell-stm )

Pricing and Availability

SourcePoint for Intel supporting Intel Trace Hub is available now from ASSET InterTech and its distributors. Pricing starts at $4,950. For product information, call 888-694-6250, fax 972-437-2826, e-mail ai-info@asset-intertech.com or visit www.asset-intertech.com.

About ASSET InterTech

ASSET InterTech (www.asset-intertech.com) is a leading supplier of tools to debug, validate and test software and hardware. The company’s SourcePoint™ software debug and trace platform and ScanWorks® platform for embedded instruments work in tandem to give engineers real insight from code to silicon. SourcePoint is a best-in-class, powerful debugger that includes advanced trace tools to gather data from code and quickly debug complex embedded software systems. ScanWorks controls instruments embedded in chips to test and validate chips and circuit boards. Together they empower engineers with tools and technology for the entire life-cycle of a system, beginning with software and hardware development, on to design validation, through software/hardware integration, and eventually the testing of the product in manufacturing and field service. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

Follow us on:

Facebook:        https://www.facebook.com/ASSETInterTech

LinkedIn:        http://www.linkedin.com/company/asset-intertech-inc.

Twitter:           https://twitter.com/ASSETInterTech

YouTube:        http://www.youtube.com/ASSETInterTech

Blog:               http://blog.asset-intertech.com/

Leave a Reply

featured blogs
Apr 26, 2024
LEGO ® is the world's most famous toy brand. The experience of playing with these toys has endured over the years because of the innumerable possibilities they allow us: from simple textbook models to wherever our imagination might take us. We have always been driven by ...
Apr 26, 2024
Biological-inspired developments result in LEDs that are 55% brighter, but 55% brighter than what?...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Enabling the Evolution of E-mobility for Your Applications
The next generation of electric vehicles, including trucks, buses, construction and recreational vehicles will need connectivity solutions that are modular, scalable, high performance, and can operate in harsh environments. In this episode of Chalk Talk, Amelia Dalton and Daniel Domke from TE Connectivity examine design considerations for next generation e-mobility applications and the benefits that TE Connectivity’s PowerTube HVP-HD Connector Series bring to these designs.
Feb 28, 2024
7,943 views