industry news
Subscribe Now

Sonics Introduces Semiconductor IP Industry’s First Power Management Solution Combining Fine-Grain Partitioning and Autonomous Control

Milpitas, Calif. – May 12, 2015 – Sonics, Inc., the world’s foremost supplier of on-chip network (NoC) technologies and services, today introduced the ICE-Grain (Instant Control of Energy) Power Architecture for system-on-chip (SoC) design teams that require an automated power management solution with “worry-free implementation” at the highest level of abstraction. Sonics’ ICE-Grain Power Architecture is the semiconductor IP industry’s first and only complete power management sub-system comprised of configurable hardware IP blocks, embedded control software, and integrated design tool environment.

With the ICE-Grain Power Architecture, SoC designers partition their chips into much finer “grains,” which enables up to 10x faster and more precise power control. Power “grains” are very small sections of an SoC that include functional logic that can be individually power controlled using one or more savings methods. A grain is connected to one or more clock domains and attached to at least one power domain, and includes defined signals and conditions for power control. Grains are often an order of magnitude smaller than conventionally independent power or clocking domains, and multiple grains can be composed into larger hierarchical grains. The ICE-Grain Power Architecture automates the tasks of grain connection and management by synthesizing both central and local control circuitry blocks for the greatest total SoC power reduction.

Sonics is targeting the ICE-Grain Power Architecture to mainstream SoC design teams creating energy-sensitive applications in consumer, IoT, mobile, wearables, automotive, and set-top box markets. These teams typically lack the engineering resources or time necessary to develop sophisticated, highly responsive, fine-grain power management schemes. Their resulting chips often consume more energy than necessary and sometimes significantly more than the design specification allows.

For mainstream SoC design teams, the ICE-Grain Power Architecture is an automated solution providing the most advanced capabilities and benefits of sophisticated power management schemes to address critical trends such as:

1. The number of clocking, power and voltage domains that require independent control is increasing;

2. The number of power events that need to be processed is increasing dramatically. These events must be managed at run-time to satisfy power constraints;

3. Power and energy budgets are tightening and becoming more challenging, including thermal, battery, and regulatory limits.

“Sonics is keenly aware of the power problem in today’s designs from our long history integrating battery-powered SoCs with on-chip networks and from our recent power research and patent work,” said Drew Wingard, CTO of Sonics. “Our goal with the ICE-Grain Power Architecture is to give system architects the IP, drivers, and automation tools they need to address power reduction early in the SoC design process where it proves most effective. To save power, designers must power-down parts of the SoC as quickly as possible to eliminate leakage current, and then power the parts back up just in time. Our fine-grain approach controls power in hardware for much faster switching between states. This approach also implements dynamic voltage and frequency scaling to take advantage of the high dependence of active power on voltage.”

Saves More Power Than Conventional Power Management Approaches

Compared to conventional, software-controlled approaches, Sonics’ fine-grain technique provides many more opportunities to turn parts of the chip to low-power states. Its hardware-controlled state transitions enable the architecture to optimize the power state to match the operating conditions of the controlled grain. This allows SoC designers to exploit many more “dark silicon” states than they can typically achieve using software-controlled approaches.

Key ICE-Grain Power Architecture features and benefits are:

1) The first commercial technology to manage and control all common power techniques in a unified environment.

  • Hardware identification of power saving opportunities
  • Unique “wake on demand” technique allows automated grain shut down and instantaneous wake up when needed
  • Hardware control of clock, isolation, retention, and power gating sequences
  • Hardware control of operating points for DVFS (dynamic voltage and frequency scaling) and AVS (adaptive voltage scaling)
  • Leverages existing software-controlled power management techniques

2) Scalable, distributed, and modular architecture.

  • Centralized grain controller block manages individual and inter-grain power sequencing and operating point assignment
  • Distributed, local controller blocks per grain handle power sequence execution and minimize the logic in the always on domain
  • Hardware event control system supports hundreds of grains with predictable, low latency and virtually no impact on processor performance

3) Easy, worry-free implementation of hardware control and fine-grain power reduction.

  • Scales to support hundreds of power grains that are correct-by-construction and include on-chip debug and monitoring
  • Minimal area and power impact to the original design

4) EDA tool support complies with industry-standard tools, flows, and formats.

5) Complete, integrated solution; no special power expertise required.

  • With the ICE-Grain Power Architecture, designers work at the highest level of abstraction, which means they do not have to be power management experts to adopt and use the solution.
  • Leverages existing power management techniques where designers can integrate some or all of their existing software-based approach

“We have followed Sonics for many years and can confirm that the company has been exposed to power issues in more than 250 chip designs,” said Rich Wawryzniak, Senior Market Analyst: ASIC & SoC, Semico Research Corp. “They have applied that body of knowledge and years of power reduction development work in their on-chip network products and are now focused on solving the power problem for the broader SoC market place. There is a large market opportunity for an IP supplier that delivers a commercial solution on par with the most advanced power schemes developed by the “army of experts” at large system companies like Apple. We believe there is strong pent-up demand for an automated power management solution with chip design teams building mainstream products in more modest volumes than Apple. Sonics is well-positioned to take advantage of this opportunity.”

Availability

Sonics is currently engaging with a limited number of early access technology partners who are interested in using the ICE-Grain Power Architecture for SoC design projects in 2015. Partners can implement the ICE-Grain Power Architecture independently of Sonics’ on-chip networks; however, there are strong synergies when they are used together. Sonics plans product announcements related to the ICE-Grain Power Architecture in late 2015.

About Sonics, Inc.

Sonics, Inc. (Milpitas, Calif.) is the trusted global leader in on-chip network (NoC) technologies used by the industry’s top semiconductor and electronics product companies. Sonics was the first company to develop and commercialize NoCs, accelerating volume production of complex systems-on-chip (SoC) that contain multiple processor cores. Our comprehensive NoC portfolio delivers the communication performance required by today’s most advanced consumer digital, communications and information technology devices. Sonics’ NoCs are integral to the success of SoC design platforms that innovators such as Broadcom®, Intel®, Marvell®, MediaTek, and Microchip® rely on to meet their most demanding SoC integration and time-to-market requirements. We are a catalyst for design methodology change and actively drive industry conversation on the Agile IC LinkedIn group. Sonics’ holds approximately 150 patent properties supporting customer products that have shipped more than four billion SoCs. For more information, visit sonicsinc.com, and follow us on Twitter at twitter.com/sonicsinc.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

Introducing Altera® Agilex 5 FPGAs and SoCs

Sponsored by Intel

Learn about the Altera Agilex 5 FPGA Family for tomorrow’s edge intelligent applications.

To learn more about Agilex 5 visit: Agilex™ 5 FPGA and SoC FPGA Product Overview

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

FleClear: TDK’s Transparent Conductive Ag Film
Sponsored by Mouser Electronics and TDK
In this episode of Chalk Talk, Amelia Dalton and Chris Burket from TDK investigate the what, where, and how of TDK’s transparent conductive Ag film called FleClear. They examine the benefits that FleClear brings to the table when it comes to transparency, surface resistance and haze. They also chat about how FleClear compares to other similar solutions on the market today and how you can utilize FleClear in your next design.
Feb 7, 2024
12,410 views