industry news
Subscribe Now

Imec Reports Breakthrough Results on Directed Self-Assembly at SPIE Advanced Lithography 2015

Leuven (Belgium)–Feb. 19, 2015–At next week’s SPIE advanced lithography conference, to be held in San Jose, Calif., Feb. 2226, imec will present breakthrough results on Directed Self-Assembly (DSA) process development. Together with semiconductor equipment supplier Tokyo Electron and Merck, a leading chemical and pharmaceutical company that acquired AZ Electronic Materials in May 2014, imec has significantly improved DSA defectivity in the past year, approaching single-digit values. 

Additionally, the partners have developed a DSA solution for a via patterning process compatible with the 7nm technology node. Furthermore, imec has developed a new chemo-epitaxy flow for 30nm and 45nm pitch hexagonal holes patterning using a single 193nm immersion exposure, envisioning DSA patterning for the storage-node for DRAM applications.

Reducing defectivity in DSA and improving patterning reliability is one of the main roadblocks to creating an industrially-viable DSA patterning process to push 193nm immersion litho beyond its current limits. Imec and its partners, Merck and Tokyo Electron, have made significant progress on this aspect, achieving best-in-class defectivity values of 24 defects/cm2. 

“Over the past few years, we have realized a reduction of DSA defectivity by a factor 10 every six months,” stated An Steegen, senior vice president of process technologies at imec. “Together, with Merck and Tokyo Electron, providing state-of-the-art DSA materials and processing equipment, we are looking ahead at two different promising DSA processes that will further improve defectivity values in the coming months. Our processes show the potential to achieve single-digit defectivity values in the near future without any technical roadblocks lying ahead.”

Imec, Merck and Tokyo Electron also achieved breakthroughs in two other barriers in the development of DSA patterning solutions. First, decomposition of an N7 compatible via layer was achieved.  This required a novel templated DSA process with polystyrene (PS)-wetting sidewalls of the template pre-pattern. This process allows to significantly reduce the critical dimension (CD) of the template, in comparison to using the conventional a polymethylmetacrylate (PMMA)-wetting scheme. Second, an etch process has been developed to transfer the small vias (~15nm CD) into the underlying hard mask with excellent open hole rate.

Furthermore, imec has developed a new chemo-epitaxy flow for patterning of highly dense 45nm pitch hexagonal hole arrays. The process paves the way to single patterning 193nm immersion lithography in DRAM applications. Cost is crucial in standalone memory, and DRAM scaling will heavily rely on advanced patterning techniques enabling ? 45nm storage node pitch with a minimal number of steps for D14 and beyond.

“In today’s consolidating semiconductor landscape, equipment and material suppliers are playing a key role in tackling the scaling challenges and accelerating technology advancements. Our progress on DSA process development is a testament to this, and the result of a deeply concentrated collaboration with Tokyo Electron and Merck, providing the advanced process tooling and materials knowledge paramount to achieve these breakthroughs.” added Steegen. “As an answer to the evolutions in the industry, we are setting up a supplier hub, aiming to offer a neutral, open innovation R&D platform that closely involves suppliers at an early process step and module development stage and allows for efficient cost sharing, minimized risk and optimized return on investment for all in the semiconductor ecosystem. Following recent announcements concerning imec’s equipment supplier hub, which has already resulted in research acceleration, we are now increasing our efforts to build a material supplier hub, which will be a focus in 2015.” 

On October 2627, 2015, imec will organize, in collaboration with SEMATECH, EIDEC and CEA-Leti, the 1st International Symposium on DSA. The aim of the symposium is to identify key remaining challenges for insertion of DSA into semiconductor manufacturing and to identify potential solutions. More information http://www.dsasymposium.org/

This press release can be downloaded at http://www2.imec.be/be_en/press/imec-news/imec-SPIE-advanced-litho-DSA.html

About imec

Imec performs world-leading research in nanoelectronics and photovoltaics. Imec leverages its scientific knowledge with the innovative power of its global partnerships in ICT, healthcare and energy. Imec delivers industry-relevant technology solutions. In a unique high-tech environment, its international top talent is committed to providing the building blocks for a better life in a sustainable society. Imec is headquartered in Leuven, Belgium, and has offices in the Netherlands, Taiwan, US, China, India and Japan. Its staff of over 2,080 people includes more than 670 industrial residents and guest researchers. In 2013, imec’s revenue (P&L) totaled 332 million euro. Further information on imec can be found at www.imec.be. Stay up to date about what’s happening at imec with the monthly imec magazine, available for tablets and smartphones (as an app for iOS and Android), or via the website www.imec.be/imecmagazine

Imec is a registered trademark for the activities of IMEC International (a legal entity set up under Belgian law as a “stichting van openbaar nut”), imec Belgium (IMEC vzw supported by the Flemish Government), imec the Netherlands (Stichting IMEC Nederland, part of Holst Centre which is supported by the Dutch Government), imec Taiwan (IMEC Taiwan Co.) and imec China (IMEC Microelectronics (Shanghai) Co. Ltd.) and imec India (Imec India Private Limited).

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...

featured video

Why Wiwynn Energy-Optimized Data Center IT Solutions Use Cadence Optimality Explorer

Sponsored by Cadence Design Systems

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.

Learn more about how Wiwynn is developing a new methodology for PCB designs with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver.

featured paper

Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning Applications

Sponsored by Intel

Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI.

Click here to read more

featured chalk talk

E-Mobility - Charging Stations & Wallboxes AC or DC Charging?
In this episode of Chalk Talk, Amelia Dalton and Andreas Nadler from Würth Elektronik investigate e-mobility charging stations and wallboxes. We take a closer look at the benefits, components, and functions of AC and DC wallboxes and charging stations. They also examine the role that DC link capacitors play in power conversion and how Würth Elektronik can help you create your next AC and DC wallbox or charging station design.
Jul 12, 2023
33,540 views