industry news
Subscribe Now

New eBook explains faster parallel programming of memories via JTAG on manufacturing lines

Richardson, TX (April 9, 2014) ? Programming memory on the manufacturing line after the devices have been soldered to a circuit board must be accomplished quickly to keep pace with the assembly process. Unfortunately, the capacity of flash has gotten so large and the amount of data being programmed into them so extensive that the process has slowed considerably. 

A new eBook published by ASSET® InterTech (www.asset-intertech.com) explains how distributed architectures and on-board field programmable gate arrays (FPGA) accessed via JTAG can be deployed to accelerate in-line in-system programming (ISP) without jeopardizing the manufacturing beat rate. 

?Parallel programming ? or loading data into multiple circuit boards simultaneously ? speeds up the process by orders of magnitude,? said Kent Zetterberg, technical product manager for the ScanWorks® platform for embedded instruments. ?In addition, a programming engine can be temporarily inserted into an on-board FPGA to program multiple devices on the same board at the same time. When you start adding up all of the factors, you?ve got a really fast in-line programming process.? 

Titled ?Fast Flash Parallel In-System Programming?, the new eBook is available for free and can be downloaded from the eResources center on the ASSET website athttp://www.asset-intertech.com/Products/Boundary-Scan-Test/BST-Software/Fast-Flash-Parallel-In-System-Programming-ISP-JTAG 

Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test can be downloaded from the ASSET website at: http://www.asset-intertech.com/eResources

About ASSET InterTech

ASSET InterTech is a leading supplier to the electronics industry of tools based on embedded instrumentation. Its SourcePoint debugger and the ScanWorks platform for embedded instruments overcome the limitations of external test and measurement equipment by applying instrumentation embedded in code and semiconductors to debug and validate software and firmware, and to perform design validation and manufacturing test on chips and circuit boards. ASSET’s recent acquisition of Arium (www.arium.com) added a powerful suite of firmware debug and trace tools to the ScanWorks platform. Designers can quickly debug firmware and then diagnose how it interacts with hardware. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080. 

Leave a Reply

featured blogs
Apr 26, 2024
LEGO ® is the world's most famous toy brand. The experience of playing with these toys has endured over the years because of the innumerable possibilities they allow us: from simple textbook models to wherever our imagination might take us. We have always been driven by ...
Apr 26, 2024
Biological-inspired developments result in LEDs that are 55% brighter, but 55% brighter than what?...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Addressing the Challenges of Low-Latency, High-Performance Wi-Fi
In this episode of Chalk Talk, Amelia Dalton, Andrew Hart from Infineon, and Andy Ross from Laird Connectivity examine the benefits of Wi-Fi 6 and 6E, why IIoT designs are perfectly suited for Wi-Fi 6 and 6E, and how Wi-Fi 6 and 6E will bring Wi-Fi connectivity to a broad range of new applications.
Nov 17, 2023
21,341 views