industry news
Subscribe Now

Sidense 1T-OTP Helps Calibrate Aptina’s Advanced Imaging Products

Ottawa, Canada – (February 21, 2012) – Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores, announced that Aptina, a leading provider of CMOS image sensors and camera modules, is using Sidense’s field-programmable 1T-OTP memory macros for several image sensor and camera module products for the mobile, consumer, automotive and surveillance markets. Developed for use at TSMC’s 65nm low-power (LP) process node, the 1T-OTP macros provide a reliable and flexible memory solution in a small footprint to support calibration and optimization of image sensors in a chip, module or system environment. 

“Aptina chose Sidense OTP for storing calibration and lens correction information in our image sensor and companion chip products for its small macro area, reliable field programmability to support correction in finished modules, and scalability to new process nodes for future product development,” said Sion Quinlan, Aptina’s Director of Circuit IP. “Because Sidense’s OTP does not add any additional processing steps or masks to our sensor process, Aptina benefits with a cost and time savings.” 

Aptina products are used in a broad range of products including smartphones, tablets, laptops, digital and video cameras, as well as in surveillance, automotive, medical, video conferencing, and gaming applications. 

“Acceptance by one of the industry’s leading image sensor providers validates the use of our 1T-OTP memory for image sensor calibration and trimming in products targeting several high-volume and demanding market segments,” said Xerxes Wania, President and CEO of Sidense. “We are very pleased to provide a key ingredient to Aptina for their leading image sensor and camera module products.” 

About Sidense Corp.

Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (LNVM) IP solution. With over 90 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications. 

Sidense SiPROM, SLP and ULP memory products, embedded in over 190 customer designs, are available from 180nm down to 28nm and are scalable to 20nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com

About Aptina 

Aptina is a global provider of CMOS imaging solutions that enable Imaging Everywhere™. Using performance enhancing technologies like Aptina A-Pix™, DR-Pix™ and award winning MobileHDR™, Aptina has created a market-leading portfolio of image sensor products found in leading consumer electronics like smartphones, tablets, laptops, digital and video cameras, as well as applications in surveillance, automotive, medical, video conferencing, and gaming. Aptina drives innovation in the market with industry recognized products like the AR0331 surveillance image sensor and the 16MP APS-C DSLR sensor. Privately held, Aptina’s investors include Riverwood Capital, TPG Capital and Micron Technology. For additional information on Aptina visit www.aptina.com or subscribe to the latest news from Aptina by copying the Aptina RSS feed into your favorite RSS reader. 

Leave a Reply

featured blogs
Apr 26, 2024
Biological-inspired developments result in LEDs that are 55% brighter, but 55% brighter than what?...

featured video

Why Wiwynn Energy-Optimized Data Center IT Solutions Use Cadence Optimality Explorer

Sponsored by Cadence Design Systems

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.

Learn more about how Wiwynn is developing a new methodology for PCB designs with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver.

featured paper

Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning Applications

Sponsored by Intel

Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI.

Click here to read more

featured chalk talk

Data Connectivity at Phoenix Contact
Single pair ethernet provides a host of benefits that can enable seamless data communication for a variety of different applications. In this episode of Chalk Talk, Amelia Dalton and Guadalupe Chalas from Phoenix Contact explore the role that data connectivity will play for the future of an all electric society, the benefits that single pair ethernet brings to IIoT designs and how Phoenix Contact is furthering innovation in this arena.
Jan 5, 2024
16,308 views