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GiDEL Announces Its Third-Generation ASIC Prototyping Systems Based on on Altera’s Stratix IV E FPGAs

Kane Computing are pleased to announce that GiDEL recently launched the PROC_SoC3-4S™ and the PROC_SoC10-4S™ ASIC Prototyping Systems utilizing the industry’s largest FPGAs – Altera’s Stratix® IV E FPGA featuring 820K logic elements (LEs).

The PROC_SoC3 and PROC_SoC10 are GiDEL’s third-generation ASIC Prototyping Systems. Featuring the industry’s largest and fastest FPGA, the Stratix IV E FPGA-based PROC-SoC ASIC Prototyping Systems are designed to debug and verify today’s most advanced SoC designs. The PROC_SoC3-4S is able to support designs up to 36 million ASIC gates and the PROC_SoC10-4S is able to support designs up to 120 million ASIC gates. By leveraging the system’s flexible architecture, both ASIC prototyping systems can be connected to provide support for up to 360 million ASIC gates. The systems are architected and designed to operate at system clock speeds up to 300MHz.

The PROC_SoC ASIC Prototyping Systems set a new standard for ASIC verification, ASIC prototyping, system performance, price/capacity, interconnect flexibility and ease-of use. The systems offer an organized chassis which includes user add on logic, boards, management software and advanced debug tools.

“We are pleased to base our next-generation ASIC Prototyping Systems on Altera’s Stratix IV E FPGA,” said Reuven Wientraub, GiDEL’s President and CTO. “Combining the industry’s highest density FPGA shipping today with our flexible PROC_SoC prototyping environment enables us to provide the most advanced, highest-capacity solution to our customers.”

“GiDEL has been a strong partner of Altera for many years and has always leveraged our most advanced FPGAs,” said Jim Smith director of professional services, training and boards, commented at Altera. “Today almost every new ASIC project uses FPGAs for ASIC prototyping and we are committed to providing the industry’s highest density devices to support this market. GiDEL’s PROC_SoC systems provide advanced prototyping solutions with a powerful combination of high-performance, high-density FPGAs and advanced software tools.”

About GiDEL

GiDEL (www.gidel.com) is the first company to introduce ASIC Prototyping Systems and has been leading the ASIC Prototyping technology for over a decade with its cutting-edge architectures, solutions and methodologies. Its family of PROC_SoC ASIC Prototyping Systems with its patented technology allowing any FPGA to directly connect to any other FPGA enables the highest performance in prototyping, and its new TotalHistory debug feature provides a new dimension to prototyping debug.

About Kane Computing

KCL (www.kanecomputing.co.uk) has been providing Image Processing, DSP and high performance computing products for use in industry, education and research since 1987 and is a Texas Instruments Third Party Partner specialising in consultancy and advice on TI development tools/platforms and image processing applications. KCL have extensive knowledge and experience of providing video compression solutions for many industries particularly for digital video security and high quality broadcast applications. KCL has a policy of continual improvement and operates its business in accordance with the requirements of ISO9001:2000.

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Siemens Building Technologies Division Expands its Mentor Graphics Design Environment with Expedition Enterprise and HyperLynx Signal Integrity/Power Integrity Solution

WILSONVILLE, Ore., December 21, 2010 – Mentor Graphics Corporation (NASDAQ: MENT) today announced that Siemens Building Technologies Division, Switzerland, has successfully benchmarked the Mentor Graphics® Expedition® Enterprise printed circuit board (PCB) design flow and has smoothly migrated from its existing Board Station® design environment and tools of other PCB design solution vendors to Expedition Enterprise and the HyperLynx® Signal Integrity (SI)/Power Integrity (PI) analysis product.

The Expedition Enterprise solution provides a concurrent team design flow capability, which enables multiple layout designers from remote locations to simultaneously work from a single design database. This capability is built on Mentor’s award-winning PCB layout architecture which allows for an interactive and automatic design within a single, correct-by-construction design environment. By using the Expedition Enterprise product, Siemens is able to shorten the development process, optimize their design capability, and reduce the number of design cycles.

Siemens Building Technologies Division selected the HyperLynx signal and power integrity product because of its accurate analysis and simulation capabilities, ease-of-use, and quick set-up time. It represents the ideal solution for today’s high-density PCBs.

Combined with the Expedition Enterprise platform, the HyperLynx product offers a comprehensive solution for designing high-performance electronic products. The HyperLynx product suite improves product quality and ensures predictable design costs by reducing the number of prototypes, manufacturing re-spins and overall development costs.

“After evaluating tools from Mentor Graphics and another well-known EDA supplier, the Expedition Enterprise flow finally gained the upper hand,” said Thomas Mäder, Director Hardware Engineering Group, Siemens Switzerland (AG), Building Technologies. “The migration to the new Expedition tool generation was well managed and conducted successfully with great support from Mentor Graphics. We implemented a similar process as before, but with an improved flow that facilitates the cooperation between different locations. Starting as a pilot platform for a real project, which could be completed in less time than previous projects by eliminating many design issues, we have been able to successfully use the new technology after a short transition period.”

“We are very pleased to be able to further expand our long-term partnership with Siemens Building Technologies Division,” said Matthias Knoppik, Area Director for Mentor Graphics Central Europe. “Mentor’s market-leading products such as Expedition Enterprise help global companies with international operations meet challenges that arise from having resources distributed around the world. This includes enterprise-wide management of IP (intellectual property) and of design teams, as well as supply-chain integration beyond the limits of individual locations. This leads to a boost in developer productivity and makes it easier for teams to collaborate, while ensuring the smooth exchange of information within the company.”

About Siemens Building Technologies

The Siemens Building Technologies Division (Zug, Switzerland) is the world’s leading provider of safe, secure and energy efficient solutions for buildings (“Green Buildings”) and building infrastructure. As a service provider, system integrator and product supplier, Building Technologies offers building automation, HVAC, fire safety, security, low voltage power distribution and electrical installation technology. With around 42,000 employees worldwide (September 30), Building Technologies achieved a turnover of €6.9 billion in fiscal year 2010.www.siemens.com/buildingtechnologies.

About Mentor Graphics

Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

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