EEJournal

fresh bytes
Subscribe Now
August 25, 2014

The Napa earthquake woke this many Jawbone Up wearers

by Larra Morris

Screen_Shot_2014-08-25_at_12.49.52_AM.png

Sleep tracking is one of the best features of the Jawbone Up fitness tracker, but it could serve a purpose beyond helping you feel less groggy in the morning. Jawbone’s data science team has collated the sleep information from last night in northern California — which was hit by its biggest earthquake in 25 years — and used it to show what percentage of Up wearers in each city were woken up at 3.20AM PT. Napa was among the worst affected areas, whereas Santa Cruz barely registered a tremor, according to the sleep data.
via The Verge

Continue reading 

Leave a Reply

featured blogs
Captivating Component Art
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
More from Max's Cool Beans...
Why Analog Design Challenges Need Breakthrough Technologies
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....
More from Synopsys...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

PIC® and AVR® Microcontrollers Enable Low-Power Applications
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Marc McComb from Microchip explore how Microchip’s PIC® and AVR® MCUs are a game changer when it comes to low power embedded designs. They investigate the benefits that the flexible signal routing, core independent peripherals, and Analog Peripheral Manager (APM) bring to modern embedded designs and how these microcontroller families can help you avoid a variety of pitfalls in your next design.
Click here for more information about Microchip Technology 8-Bit Low-Power PIC® & AVR® Microcontroller Tools
Jan 15, 2024
16,043 views