EEJournal

fish fry
Subscribe Now
July 24, 2015

The Zen of Verification and IoT Maintenance

Finding a Holistic Way to Verify Your IoT
by Amelia Dalton

Welcome to the Fish Fry commune my friends. This week we’re bringing zen to your IoT verification process. My guest is John Koeter from Synopsys and we are taking a closer look at holistic ways to verify our IoT designs. John and I discuss verification in IoT, the unique challenges of IP in IoT, and the best places for foodies in the Bay Area. Also this week, we check out how you can lower your BOM bottom line (that might not be obvious by simply looking at component costs) and we’re giving everyone another chance to win an Odyssey MAX® 10 FPGA and BLE Sensor Kit.


 

Download this episode (right click and save)

Links for July 24, 2015

More information about Synopsys’ DesignWare IP for the Internet of Things

Synopsys and TSMC Collaborate to Develop Integrated IoT Platform for TSMC 40-nm Ultra-Low-Power Process

New Episode of Chalk Talk: 10 Secrets to Getting a Lower BOM Cost

More information about the Odyssey MAX® 10 FPGA and BLE Sensor Kit

Mpression Odyssey Kit Example Applications: Track Rover and Quadcopter


Leave a Reply

featured blogs
BoardSurfers: Training Insights: Design Effortlessly Using Structures in Allegro X
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
More from Cadence...
Want to Mix and Match Dies in a Single Package? UCIe Can Get You There
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
More from Synopsys...
One Robotic Step Closer to Humanoid Robots in the Home
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...
More from Max's Cool Beans...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

ROHM's 4th Generation SiC MOSFET
Sponsored by Mouser Electronics and ROHM Semiconductor
In this episode of Chalk Talk, Amelia Dalton and Ming Su from ROHM Semiconductor explore the benefits of the ROHM’s 4th generation of silicon carbide MOSFET. They investigate the switching performance, capacitance improvement, and ease of use of this new silicon carbide MOSFET family.
Click here for more information about ROHM Semiconductor 4th Generation N-Channel SiC Power MOSFETs
Jun 26, 2023
34,426 views