fish fry
Subscribe Now

Design Tool Death Match: FPGAs, PCBs and We’re Caught in the Middle

Fish Fry - February 4, 2011

In my Fish Fry this week, I check out DesignCon at the Santa Clara Convention Center, interview Brad Griffin from Cadence about Power Distribution Networks and try to find out why FPGAs are such bad team players when it comes to board design. Also this week, I answer questions from loyal listeners and offer up another fantastic nerdy giveaway.

If you like the idea of this new series, be sure to drop a comment in the box below. I appreciate all of your comments so far, and we will be working to enhance the Fish Fry each week – as long as you’re watching.

 


 

Watch Previous Fish Frys

Fish Fry Links – February 4, 2011

DesignCon 2011

PDN Analysis Technology at DesignCon 2011

Kevin Morris’s Panel Session at DesignCon 2011: Designing FPGA Based PCBS

Kevin Morris’s article: ESL Gambit

Microchip MPLAB® PIC18 Starter Kit

Leave a Reply

featured blogs
Aug 15, 2018
Yesterday was the first of two posts about Cadence Automotive Solutions. Today we go down into the details a bit more. However, there are so many details that this will be more of a map of the landscape so you get an idea of the breadth of our technology. Each item could have...
Aug 14, 2018
I worked at HP in Ft. Collins, Colorado back in the 1970s. It was a heady experience. We were designing and building early, pre-PC desktop computers and we owned the market back then. The division I worked for eventually migrated to 32-bit workstations, chased from the deskto...
Aug 14, 2018
Introducing the culmination of months of handwork and collaboration. The Hitchhikers Guide to PCB Design is a play off the original Douglas Adams novel and contains over 100 pages of contains......
Aug 9, 2018
In July we rolled out several new content updates to the website, as well as a brand new streamlined checkout experience. We also made some updates to the recently released FSE locator tool to make it far easier to find your local Samtec FSE. Here are the major web updates fo...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...