Embedded Systems Conference 2007 in San Jose has ended, but we have devised a devious database of alphabetically arranged alliterative announcements to alleviate any anxiety you might feel from foregoing this fabulous event and thus missing out on the embedded action from an FPGA perspective. Rather than rely on a plethora of press releases flying in formation, we’ve condensed the conference into a laundry list of simplified summaries – ready for the pleasure of your perusal.
Actel – addresses the audience in association with ARM – announcing the creative new Cortex-M1 core – custom created for FPGA. Back in the booth, they’re busily busking the hours away, ignoring the igloo’s slow slide from solid to liquid – making the point that even the most carefully engineered creations struggle with the inevitable loss of efficiency. Actel’s recently announced Igloo FPGAs, however, are stingy enough with power that your batteries, like the show-floor ice sculpture, won’t disappear prematurely.
Al Gore – announces that all of us engineers can contribute to the cause of controlling carbon emissions and explains that the environment and profitability are not mutually exclusive. Our challenge, he says, is to build intelligence into everyday devices that will improve their efficiency – allowing our ecosystem to endure beyond the next couple of decades.
Altera – alters our perception of programmable logic reality with the new low-cost 65nm Cyclone III. Competitors can’t yet match the Moore’s Law metrics made possible by the process-node move to 65nm, but they likely won’t be too far behind. Altera already is making inroads into applications where low cost, low power, and high performance are in a critical balance.
Altium – alerts us to the awesome angles of the new nanoboard 2. The newest nanoboard is not content to be constrained to dreary development duty. Pondering the possibility of production use of programmable, pre-designed PCBs, we realize that, despite their designation as a design automation company, Altium aims to put programmable logic solutions on every engineer’s desktop. Low-cost Altium Designer continues to creep up on the capabilities of the most expensive point-tool EDA technology, but in one integrated package – begging us to believe that their vision of unified design is moving from the grass roots up to executive row, and that their low-cost, low-learning-curve approach may make complex system design easier and more accessible than ever before.
Celoxica – continues to create compelling stories of signal and video processing prowess with exotic ESL technology easing the actualization of algorithms that would bring traditional processors to their knees. Fusing the flexibility of FPGAs with the productivity of ESL, Celoxica sells solutions that deal with the dirty-work of design, leaving us to focus on the few items of most concern – those things that will differentiate our products from the competition.
Lattice – laid low at the show, making the most of their previously positioned products. Their SC, XP, ECP2, and ECP2M alphabet soup sport a surplus of serious features not found on competitors’ corresponding products.
Mentor Graphics – markets more diverse design automation tools than perhaps anyone else at the event. Showcasing their software products for embedded programmers, they also remembered to remind us that they boast a bevy of co-simulation, platform creation, FPGA design, board design, and system simulation products to equip any imaginable embedded systems design group with top-flight technology.
National Instruments – name-dropped Freescale and Wind River in their ESC announcement of a new CompactRIO controller that combines Freescale’s MPC5200 with Wind River VxWorks RTOS to enable embedded engineers to dispense with the design and get right to processing their data. Combined with a Xilinx FPGA, the system lets you quickly customize both hardware and software to suit your industrial monitoring and control requirements.
Samplify – strutted their startup stuff with FPGA-based configurable compression IP. If your sensor is pumping out more data than your DSP datapath can drink or more samples than your serial I/O can schlep, consider compressing the information at the source – using their patented lossless or lossy high-speed hardware-accelerated IP blocks.
Synplicity – sifted through embedded trade-show attendees, dancing with those who desire top-drawer synthesis for serious FPGA work, wooing those who want to prototype system-on-chip ASIC using the flexibility of FPGAs and preaching a performance message to those who seem satisfied settling for silicon-vendor-supplied synthesis systems.
Vmetro – verified that they believe in the power of programmable logic with PMC products announced at the show. They front computationally-intensive problems with FPGA-based cards that crunch numbers while the samples are streaming, managing monster problems like SDR data streams.
Xilinx – Extracted editors from the embedded show into a super-secret cell hidden handily in the press room (which they sponsored). Within those walls, company execs explained the coalescence of the embedded and DSP groups within the world’s largest FPGA company and re-iterated that their recent release of Spartan-3 DSP is only the tip of the Xilinx signal-processing iceberg.
Although our alphabet may have some holes, you can presume that programmable logic permeated ESC this year. Certainly, the FPGA-savvy companies above are but a few of the scores that presented at the show. While some may say the event was slightly smaller than in previous years, we found that there was far more than we could absorb in the time frame allotted. With FPGAs moving steadily from supporting roles to center stage in most embedded designs, we are already excited to see what programmable logic progress next year’s ESC will bring.