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Mapping MAPLD

The Conference That Could

It’s difficult for a technical conference to get just the right balance. Too much tradeshow, not enough industry participation; too many irrelevant sessions, too many times over the same topic; not enough attendees, too many attendees… it’s like trying to hit your design constraints for power, cost, area, performance, and reliability all at the same time, while still meeting your schedule. You struggle to reach one goal only to find out that you’ve slipped behind on the others. It’s a fight to find a creative solution that will converge.

The eighth annual Military and Aerospace PLD conference (MAPLD) held last week in Washington DC seems to have found that elusive equilibrium, however. The 500-ish attendees create a comfortable-sized event – enough brilliant people so there’s always somebody very interesting to chat with, and not so many that you have to wait in line at the coffee bar. The size of the venue (the lower floor of the Ronald Reagan building on Pennsylvania Avenue) is about right to give you a workout as you sneaker-shuttle between the food, the technical sessions, and the show floor, but not so large that you have to catch a bullet train to make your next talk on time. The understated exhibit lounge provides a nice and useful supplement to the technical program instead of acting as a distraction. This is a worthwhile event for exhibitors, but not one where they feel compelled to build booths the size of Texas equipped with 50,000-watt sound systems and live white tigers jumping through flaming hoops with FPGA development boards clenched in their teeth.

The technical program here is definitely the star, and the schedule makes it easy to catch the presentations you’re interested in. Most of the time, there is a single track running in a large, comfortable auditorium. You can sit in one place and soak up the technology instead of spending half your time nervously studying your conference program, trying to apply ILP techniques to schedule your afternoon in real-time. The program is excellent, with an interesting blend of papers from industry and academia as well as fascinating and inspirational invited talks such as Dr. Steven Beckwith’s discussion of the startling scientific success of the Hubble Space Telescope.

As the conference name implies, programmable logic takes center stage here – the good, the bad, and the indeterminate. There are descriptions of some techniques that all of us could use (like how to design a safe yet efficient state machine for your FPGA, or how to apply formal verification to your next FPGA design), and other techniques that might be required less frequently for most of us (like how to fake out synthetic aperture radar with a false battleship image using FPGA-based reconfigurable computers, or how to use FPGAs to automatically dock with the Hubble Space Telescope.)

Reconfigurable computing adapted itself to the military and aerospace community at the show and emerged as one of the hottest and most controversial topics. Even though the focus of the event is the direct use of programmable logic in military and aerospace applications, reconfigurable and high-performance computing was present in force. With a well-attended dedicated session on reconfigurable computing, a double-feature “Birds of a Feather” event, a special meeting of the “Open FPGA” consortium, and show booths by virtually every major player working on high performance computing with FPGAs, it would be easy to get the idea that this was reconfigurable computing’s main muster of the year.

Reconfigurable computers came in many sizes, shapes, and philosophies as well as a huge span of price points. There were also a host of partnerships evident between creators of reconfigurable computing hardware and creators of software tools to assist in programming the beasts. The small, cheap, and fast award would have to go to the combination of Pico’s E-12 EP (which combines a Virtex-4 FX12 device with 128MB RAM and 64MB flash ROM in the form-factor of a compact flash card) and Impulse Accelerated Technologies “ImpulseC” C-to-FPGA gates tool. The combination of micro-supercomputer and development platform would probably price-in significantly less than $10K, with a GFLOPS per Gram Dollar rating that should be mind-boggling.

On the upper end of the scale, SRC, SGI, and Cray all waved their wares to the crowd. SRC was fresh with the announcement of their new SRC-7 platform with improved capability in every measurable dimension, SGI with their newly announced partnership with Nallatech – leveraging Nallatech’s experience with ultra-high performance FPGA-based embedded computing, and Cray with their partnership with leading ESL supplier Celoxica providing C-to-hardware programming support for the FPGA-accelerated Cray XD1.

As we have discussed before, radiation is not a friend of programmable logic. If anything, the attendees and presenters at this conference prove that almost any technological obstacle can be overcome if you combine creative thinking with sound engineering practices. The hard truth is that almost nothing works well or easily in space, and programmable logic, like almost everything else we take out of Earth’s protective environment, requires some thoughtful and thorough adaptation. As one would expect, the conference provided a wealth of papers and available expertise for solving those problems, complete with real-life adventures of those who have both succeeded and failed.

We could easily divide the contents of this conference almost half-and-half into “how to get those cranky FPGAs to behave when you really need them to” and “really cool and amazing things you can do with FPGAs” – the latter, of course, implicitly depending on the former. MAPLD does an extraordinary job communicating and exploring this Yin and Yang of programmable logic so that even those of us whose designs are in completely unrelated areas can benefit from the perspective.

Although this is one of the few non-proprietary conferences in the world focused exclusively on programmable logic, only a trio of FPGA vendors was on hand. Actel worked methodically to continue restoring confidence after their controversial technical difficulties over the past couple of years. Xilinx continued to make inroads by steadily increasing acceptance of their space-ready reprogrammable FPGA technology, and AeroFlex made a splash with their newest aerospace versions of QuickLogic antifuse devices.

It is unfortunate that the biggest and best-attended FPGA-specific events are also FPGA vendor-specific. While vendor-sponsored conferences are useful and educational experiences, there is also a certain Orwellian overtone one feels owing to the complete lack of contention or controversy. MAPLD provides a nice counter-example to those conferences with both positive and negative user experiences with devices and tools, and a fair forum for vendors to voice opposing opinions.

Even at MAPLD, we see the continued trend of FPGAs penetrating into the ASSP market as time-to-market accelerators and risk-reduction vehicles for ASSP vendors. Swedish Gaisler Research was on-hand with their fault-tolerant LEON3 32-bit (SPARC) RISC core pre-implemented on Actel Rad-Hard devices. The use of FPGAs allows Gaisler to get to market quickly and economically with a powerful processor for the aerospace crowd that would not be feasible to fabricate in a custom ASIC. It seems that an increasing number of ASSP vendors are seeing a win in FPGA and leveraging programmable logic to beat the risk-cost-schedule trade space that plagues the death-defying ASSP market.

Tool vendors Celoxica, Synplicity, and Mentor Graphics were all actively hawking their FPGA- and Mil/Aero-related EDA and ESL tools. Celoxica showed their impressive line of integrated software/hardware design solutions with a wealth of real-world video processing examples. Mentor touted their FPGA design tools and red-hot Catapult C synthesis technology, and Synplicity showed their industry-dominating FPGA and structured ASIC solutions along with their up-and-coming DSP design capability.

Despite the fact that MAPLD was hosted by NASA and had a predominance of defense-related content, it still had the feel of an international event. Papers, presenters, and attendees came from around the world, proving once again that engineering problems and solutions span borders and cultures and re-asserting that the responsible application of technology can benefit everyone, everywhere. When human lives, enormous sums of money, and politics are all involved in the outcome of our engineering decisions, it pays to immerse ourselves in the experience-based best practices of those who have gone before us. MAPLD is an excellent place to do that.

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