editor's blog
Subscribe Now

Intel/Altera Agreement (Partially) Tells the Tale

We did a lot of speculation in our recent articles about the rumored Intel bid to buy Altera. One of the areas of most intense speculation was the 2013 agreement the two companies signed – for Intel to manufacture 14nm FPGAs for Altera.

More than two years after that deal was signed, Intel is rumored to be making an offer to buy Altera for upwards (maybe far upwards) of $10B. But, is the existing 2013 agreement potentially weakening Intel’s bargaining position?

The key parts of the agreement that we thought could be troublesome for Intel were related to non-competition. Had Intel agreed that they would not develop FPGA technology themselves or try to buy any other FPGA company? If so, that appeared to indicate that Intel had no way to get FPGA/PLD technology (which might be crucial to defending their data center business) other than by buying it from Altera (or by buying Altera).

And, if they had agreed to that, how long were they banned from developing or acquiring FPGA technology elsewhere?

In the recent earnings conference call, Altera CEO John Daane said “…we do not want to compete with our foundry and we agreed that Intel would not invest in, develop their own product line or buy a PLD company or buy another PLD company.” That made it sound like Intel could have boxed themselves in a bit.

Now, EE Journal has obtained a (heavily redacted) copy of the 2013 agreement (which was made public by Altera). We examined this 86-page document ourselves, and we had a lawyer take a look at it as well. What we found led us to believe that Intel had not backed themselves as far into the corner as many had speculated. Here is a link to that agreement:

http://www.sec.gov/Archives/edgar/data/768251/000076825113000023/altera_2013q1x10qxex102.htm

It’s important to point out that the redacting makes analysis of this contract a bit dicey. And, there are parts that are comically heavy on the redacting. For example: “If an [*****] is [*****] by a company, then, during the term of the Agreement, Intel will [*****] accept for [*****] any [*****] for such [*****] or the [*****] company other than those specific [*****] as to which Intel is [*****] to [*****] as of the date of the [*****].”

Yep, there could be a lotta bodies buried in them there asterisks. In fact, it kinda makes us want to play Mad Libs – “If an [ELEPHANT] is [RIDDEN] by a company, then…

But, anyway, there’s a lot we can learn from the less-redacted portions.

First, does the agreement prevent Intel from developing their own FPGA technology?

Daane’s comments in the earnings call would make it seem so, but the agreement makes a point of specifying “standalone FPGAs” as the thing Intel cannot develop. But, if Intel needs FPGA fabric to build accelerators inside data center processors, or if it needs to develop FPGAs specifically to be packaged with, or used specifically with its processors, it appears that the agreement gives them a pretty big “green light” on that one.

Intel agrees that it will not produce or sell Intel­-branded Standalone PLDs (as defined below), nor invest in or acquire any companies whose principal business is the sale of programmable logic devices (“PLD Companies”), for a [*****] of the Agreement or until [*****], whichever is earlier. For clarity, this paragraph 1 of this Exhibit F is not intended to prohibit Intel from investing in investment vehicles (e.g., mutual funds, exchange traded funds) that own securities in PLD Companies solely for purposes of financial investing where such investment vehicles do not participate in any way in the management or operation of such PLD Companies. As used in this exhibit, “PLD” or “programmable logic device” means an integrated circuit that derives its value primarily due to its field programmability and contains field programmable functions such as digital logic, an interconnect fabric, IOs, and other complex IP blocks. As used in this paragraph, “Standalone PLD” is a PLD which is neither bonded with one or more other die performing material and substantial complex logic functions, nor specifically designed to be sold or to work in conjunction with another specific die performing material and substantial logic functions.

Notice the definition of “Standalone PLD”:  “an integrated circuit that derives its value primarily due to its field programmability and contains field programmable functions such as digital logic, an interconnect fabric, IOs, and other complex IP blocks.”

We don’t think a device that contained an Intel Xeon processor (or several Xeon processor cores) along with FPGA fabric would “derive its value primarily due to its field programmability.” So, it would appear that the agreement does not prevent Intel from developing and placing FPGA fabric inside an Intel processor.

As a side note – we don’t even think devices like Altera’s SoC FPGAs derive their value primarily due to field-programmability. By the time you put some 64-bit ARM cores, a bunch of memory and peripherals, other hardened IP, and a passel of multi-gigabit SerDes on a chip – there’s a BUNCH of value in there that isn’t from field-programmability.

But, what about the thing Intel announced last June – a Xeon processor bonded with an FPGA in the same package? The agreement appears to green-light that as well: “Standalone PLD” is a PLD which is neither bonded with one or more other die performing material and substantial complex logic functions, nor specifically designed to be sold or to work in conjunction with another specific die performing material and substantial logic functions.”

So, our read of that part of the document says that Intel could very well decide to accelerate their data center processors (as they have already announced) with FPGA fabric of their own – without violating the 2013 agreement.

But, can Intel buy another FPGA company if things with Altera don’t work out?

That one is much tricker. The section above does say “…nor invest in or acquire any companies whose principal business is the sale of programmable logic devices (“PLD Companies”),…” But – for how long? That information is redacted. “for a [*****] of the Agreement or until [*****], whichever is earlier.”

We could play redacted contract Mad Libs with that one – “for a [DECADE AFTER THE EXPIRATION OF THIS] Agreement, or until [2099], whichever is earlier. Or, “for a [FULL HOUR AFTER THE SIGNING OF THIS] Agreement, or until [March 2013], whichever is earlier.

The devil is in the redacted details.

But, in either case, speculation that Intel had possibly shot themselves in the foot with the 2013 agreement appears to be overblown. Intel probably could make their own FPGA fabric to use in data center processors without violating the agreement. (Although it is completely unclear how Intel would get or build the tool and support infrastructure required for any significant portion of their customer base to actually make use of that FPGA fabric.) But, Intel does appear to be prohibited from buying another FPGA company (sorry, Xilinx) at least until the passing of the redacted dates above.

Leave a Reply

featured blogs
Jul 20, 2018
https://youtu.be/KwrfcMtbMDM Coming from CDNLive Japan (camera Asushi Tanaka) Monday: Nicolas's Recipe for Digital Marketing in EDA Tuesday: Embargoed announcement Wednesday: Trends, Technologies, and Regulation in China's Auto Market Thursday: Breakfast Bytes Guide...
Jul 19, 2018
In the footer of Samtec.com, we'€™ve always made it easy to contact us by phone, email, or live chat (even fax back in the day!). To continue to progress this theme, you'€™ll now find a new helpful tool in the footer area of Samtec.com. This tool will match you up with yo...
Jul 16, 2018
Each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store the eFPGA'€™s configuration bits. Each Speedcore instance contains its own FPGA configu...
Jul 12, 2018
A single failure of a machine due to heat can bring down an entire assembly line to halt. At the printed circuit board level, we designers need to provide the most robust solutions to keep the wheels...