editor's blog
Subscribe Now

CEVA Goes for Base Stations

Mobile communications have been one of CEVA’s focus areas (others being audio and images). If you’re new to CEVA, they do DSP cores for SoCs, focusing on low power as a critical feature. (They have lots of hardware features, but at the end of the day, whether it’s a hardware accelerator or an optimized instruction set, it all leads to lower power and longer battery life.)

We’ve covered them before (albeit getting distracted by the incredible alphabet soup that characterizes this market). As complexity has grown, they’ve seen the need for multiple DSP cores, so they put together a multicore platform.

But most of their mobile effort was going into DSPs that would reside in a handset. And yes, handsets have being going multicore for lots of reasons. And with the proliferation of smartphones, they have to be the most abundant example of heterogeneous multicore. In other words, different cores for different purposes – applications, baseband, graphics, etc. This requires an asymmetric model, with every core having its own OS and memory image (possibly sharing some memory for message passing and such).

But now they’re going for more than just the handset: they’ve just introduced a new XC4500 family that focuses on mobile infrastructure – and, specifically, base stations. You might think this would just be a bigger version of what they use in the handset, which is the XC4000 family. But it’s not, because what happens in a base station is very different from what happens in a phone.

A handset is all about taking a single call or session or whatever and breaking it down to extract the content and send that content to the appropriate places in the phone. That’s not at all what a base station does; it manages traffic. It doesn’t care, for the most part, what’s happening with any particular call or session; it’s just making sure everything gets to the right place. This is, basically, packet processing.

So while the phone needs all these different processors to handle the different aspects of the content, the base station simply needs to be able to scale what it does to accommodate the amount of traffic it has to handle. Which means that, unlike the phone, it can benefit from a homogeneous multicore architecture using a symmetric approach (SMP). If one core can process x calls, then n cores can process n*x calls. More or less (yeah, I know it’s not quite that simple…).

Which makes the XC4500 look different from the XC4000, even though they’re on opposite ends of the same airwave. It’s much more like a router than it is like a phone. Because it is a router of sorts. Traffic management features allow multiple independent queues and provide built-in dynamic scheduling. Data for a specific task is stored in shared memory, so assigning it to a specific core merely involves sending a pointer rather than a time-consuming data copy. They have cache coherency infrastructure to keep all of the cores’ caches in synch as well.

You might wonder, by the way, what the opportunity is for new base stations. And, apparently, there’s not a lot of movement in the traditional fiber/cable-backhaul market, where your wireless call gets sent to the mothership over a wire. But new installations are starting to favor wireless backhaul over microwaves. That’s where they see things looking up.

You can find out more in their release.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadenceā€™s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

TE Connectivity MULTIGIG RT Connectors
In this episode of Chalk Talk, Amelia Dalton and Ryan Hill from TE Connectivity explore the benefits of TEā€™s Multigig RT Connectors and how these connectors can help empower the next generation of military and aerospace designs. They examine the components included in these solutions and how the modular design of these connectors make them a great fit for your next military and aerospace design.
Mar 19, 2024
5,316 views