industry news
Subscribe Now

VSORA Introduces Tyr Chip Family Enabling L2-L5 Autonomous Driving

Powerful, Scalable Multi-Core Companion Chip Combines AI and Advanced Signal Processing, Eliminating Specialized Co-Processors and Hardware Accelerators

PARIS, Jan. 12, 2022 (GLOBE NEWSWIRE) — VSORA, provider of high-performance silicon intellectual property (IP) solutions for artificial intelligence (AI), digital communications and advanced driver-assistance systems (ADAS) applications, today unveiled a family of PetaFLOPS computational companion chips to accelerate Level 3 (L3) through Level 5 (L5) autonomous vehicle designs.

The first full silicon solution from VSORA, Tyr™ uses a proprietary and scalable architecture to achieve unparalleled performance built on the VSORA AD1028 architecture awarded “Best Processor IP in 2020” by The Linley Group.

Delivering between 258-trillion and 1,032-trillion operations per second and consuming as little as 10 Watts, Tyr allows users to implement autonomous driving functions previously not commercially viable.

Tyr, a family of three different chips called Tyr1, Tyr2 and Tyr3, offers a fully programmable architecture that tightly couples digital signal processing (DSP) cores with machine learning (ML) accelerators necessary to design L3 through L5 autonomous driving vehicles. The Tyr companion chip is algorithm and host processor agnostic and can be integrated into new or existing environments without the need to redesign the entire system.

“We are proud to be the first to offer the ability to rapidly move to full autonomy utilizing what designers have already invested in,” remarks Khaled Maalej, CEO and founder of VSORA. “The Tyr family is the first in a series of companion chips from VSORA to provide global vehicle manufacturers early commercial availability of L3 to L5 functionality.”

Introducing the VSORA Tyr Family

The modular architecture of the Tyr family is well suited to meet the challenges of autonomous driving. With a computational power of 1,032 TeraFLOPS, the Tyr3 processes an eight-million cell particle filter using 16-million particles in less than 5 milliseconds (msec). A full-high-definition (FHD) image with Yolo-v3 takes less than 1.6 msec leading to a throughput of 625 images per second.

The Tyr family is implemented using VSORA’s proprietary low-power architecture to achieve more than 80% usage efficiency approximating the theoretical maximum processing power, eliminating the need for expensive multi-chip or hardware accelerator solutions or special cooling solutions.

Availability and Pricing

The VSORA Tyr1, Tyr2 and Tyr3 will sample in Q4 2022 and will be available in-vehicle in 2024. Pricing is available upon request.

Email requests for more information about the VSORA Tyr family or other VSORA solutions should be sent to press@vsora.com.

About VSORA

VSORA provides high-performance silicon solutions for autonomous driving and intellectual property (IP) solutions for chipmakers designing the latest generations of artificial intelligence, general high-end signal processing used in advanced driver-assistance systems (ADAS) and digital communications systems including 5G. Its powerful multi-core digital signal processing (DSP) architecture eliminates the need for DSP co-processors and hardware accelerators to provide a level of flexibility achievable only with software programming. VSORA was founded in 2015 by DSP engineers from DiBcom, now part of Parrot. has offices in Meudon-La-Forêt, France, San Diego, Calif., and Taiwan.

Leave a Reply

featured blogs
May 26, 2022
Introducing Synopsys Learning Center, an online, on-demand library of self-paced training modules, webinars, and labs designed for both new & experienced users. The post New Synopsys Learning Center Makes Training Easier and More Accessible appeared first on From Silico...
May 25, 2022
The Team RF "μWaveRiders" blog series is a showcase for Cadence AWR RF products. Monthly topics will vary between Cadence AWR Design Environment release highlights, feature videos, Cadence... ...
May 25, 2022
There are so many cool STEM (science, technology, engineering, and math) toys available these days, and I want them all!...
May 24, 2022
By Neel Natekar Radio frequency (RF) circuitry is an essential component of many of the critical applications we now rely… ...

featured video

Building safer robots with computer vision & AI

Sponsored by Texas Instruments

Watch TI's demo to see how Jacinto™ 7 processors fuse deep learning and traditional computer vision to enable safer autonomous mobile robots.

Watch demo

featured paper

Reduce EV cost and improve drive range by integrating powertrain systems

Sponsored by Texas Instruments

When you can create automotive applications that do more with fewer parts, you’ll reduce both weight and cost and improve reliability. That’s the idea behind integrating electric vehicle (EV) and hybrid electric vehicle (HEV) designs.

Click to read more

featured chalk talk

Traveo II Microcontrollers for Automotive Solutions

Sponsored by Mouser Electronics and Infineon

Today’s automotive designs are more complicated than ever, with a slew of safety requirements, internal memory considerations, and complicated power issues to consider. In this episode of Chalk Talk, Amelia Dalton chats with Marcelo Williams Silva from Infineon about the Traveo™ II Microcontrollers that deal with all of these automotive-related challenges with ease. Amelia and Marcelo take a closer look at how the power efficiency, smart IO signal paths, and over the air firmware updates included with this new MCU family will make all the time-saving difference in your next automotive design.

Click here for more information about Cypress Semiconductor Traveo™ II 32-bit Arm Automotive MCUs