AUSTIN–Silicon Integration Initiative Inc. (Si2), a research and development joint venture providing standard interoperability solutions for IC design tools, has launched a working group to standardize a new, formal declarative language that greatly simplifies finding and correcting design flaws in complex, leading-edge chip designs early in a design flow.
Named OPAL (Open Pattern Analysis for Layout), the new language has the potential to cut manufacturing costs by identifying and correcting yield-detracting patterns too complex and ambiguous to describe using conventional, design-rule checking technologies.
Jerry Frenkil, the Si2 program director of OpenStandards, said that existing solutions for checking designs in process nodes below 20 nanometers have not kept up with complex design rule expressions. “English descriptions and illustrations can no longer do the job. Without full alignment of intent and interpretation, current checking tools can create false negatives and false positives, resulting in loss of time and increased costs. Design rule checks of advanced ICs must be expressed in terms of pattern-based, shape relationships. OPAL will enable standardized, unambiguous communication of design rule intent between EDA tools. It will also limit, and in some cases eliminate, EDA tool updates due to new role modeling needs.
“FinFETS, extreme ultraviolet lithography, and multi-patterning lithography are all required to design and build the world’s most advanced integrated circuits. The complex physics behind these new designs have created an almost incomprehensible set of design rules,” Frenkil explained. Language and development experts at Intel saw the need for a visually inspired, higher-level language to quickly identify and resolve design problem areas. They developed a new approach—a new shape-focused language that allows design and manufacturing engineers to quickly collaborate on an internal set of declarative rules that help guarantee a successful chip. Intel donated the language to Si2 for standardization and distribution to the industry.
“These chipmaker-owned rules will give a higher level of control and flexibility in the increasingly difficult chip design and manufacturing environment,” Frenkil added. While the OPAL Working Group is in its formative stages, with Intel’s complete package delivered to support the effort, Si2 plans to quickly prototype and test a working version of the language and release the OPAL language reference this summer.
“OPAL was developed to meet the growing need for design engineers to quickly and succinctly describe very complex design rules,” said Ramond Rodríguez, director, Strategic CAD Capabilities at Intel. “We want others to benefit from such a language. By donating our language description and prototype code to Si2 to seed this standardization effort, we expect that OPAL will allow integration of various tools into a single design flow, along with rapid response to modeling new design rule concepts without the need for tool updates. This could reduce design costs and time-to-market for any company working on the design of leading-edge semiconductor devices.”
The OPAL Working Group is part of the Si2 OpenStandards Coalition, an incubator for projects on their way to becoming production standards. The Si2 OpenAccess database and SPICE Compact Models are two such standards. Working groups prototype concepts, adjust specifications and requirements, and, when ready, release the final standard to the industry. Working group members keep the adoption tools, including the prototype code, as an incentive for funding the work.
Jake Buurma, Si2 Fellow, has been deeply involved in Design for Manufacturing (DFM) efforts for over a decade, both in private industry—at Cadence, Silicon Navigator and Aprio—and as lead on the Si2 OpenDFM effort. “What OPAL accomplishes is uniquely different than any other Si2 effort,” Buurma said. “While our OpenDFM project developed a common DFM language that was translatable into any of the leading vendor-specific DRC languages, OPAL takes a completely different approach. It provides a new, declarative language approach to a flexible, unambiguous, and extensible description of design rule intent.”
OPAL features include:
- Lossless transfer of design rule intent between various tools and flows (and humans)
- Flexible implementation
- Ability to rapidly, unambiguously and succinctly describe complex design rules
- Expansive, advanced-node feature set for describing grids, wires, polygons and other complex structures
- Extendibility to new design rule concepts without requiring tool updates
- Automated layout test-case generator across pattern relationship values
- Ability to export to other downstream formats (illustrations, tech files, rule decks, etc.)
For more information about OPAL and the OpenStandards Working Group, contact Jerry Frenkil at firstname.lastname@example.org.
About the Silicon Integration Initiative (Si2)
Si2 is a leading research and development joint venture that provides standard interoperability solutions for IC design tools. The OpenStandards Coalition plays a pivotal role in the Si2 standards development process. It targets potential standards earlier, streamlines a path for more timely industry approval, and strengthens inter-project collaboration All Si2 activities are carried out under the auspices of the National Cooperative Research and Production Act of 1993, the fundamental law that defines R&D joint ventures and offers them a large measure of protection against federal antitrust laws.