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Power Stamp Alliance Announces ASIC Reference Design Board

[March 7, 2019] – The Power Stamp Alliance (PSA), which is creating collaborative solutions for 48V-to-low-voltage on-board DC-DC power converters, today announced a new reference design board for high-current ASIC and/or FPGA chipsets supporting the SVID or AVS protocols.

PSA 48V direct conversion DC-DC modules – or ‘power stamps’ – primarily target high-performance computers and servers being used in large data centers, many of which follow the principles of the Open Compute Project (OCP).

The new reference design board makes it easier for design engineers to evaluate the power stamp concept and products from member vendors. It can help to accelerate project development for new server designs and other equipment using ASIC devices in a 48 V source environment. The reference design features connections with e-loads and provides sockets to host load modules to test dynamic transient response and enable developers to simulate realistic loading conditions. The ASIC reference design board joins the first reference design board from the Power Stamp Alliance, which was designed for the Intel® VR13 (Intel® code named Skylake) processor architecture. The Power Stamp Alliance has a roadmap for future reference design boards, including Intel® VR13-HC (Intel® code named Ice Lake) and other processor architectures used in high performance computing.

Background Information

By creating and sharing a specification for a standard product footprint and functions, the Power Stamp Alliance has created a multi-vendor ecosystem to assure practical levels of alternate source capability to server and storage system manufacturers, while encouraging a competitive supply chain through differentiation in topology, circuitry, and performance from multiple, independent manufacturers. Formally launched at the Open Compute Project (OCP) Summit in 2018 with the publication of specifications, drawings and pin-out descriptions for main and satellite power stamps, the Alliance has since also published a new Orcad Library and Allegro Footprint Package (Macro) to its website to enable designers to embed Power Stamps into their own schematic, along with the linked Allegro reference footprint for proper layout. Most recently, the Alliance announced the industry’s first graphical user interface (GUI) that developers can use with products from any member company. The Power Stamp

PSA reference design boards, power stamps and the GUI are available from PSA member representatives, who can be contacted via the Power Stamp Alliance website http://www.powerstamp.org/contact/.

The Power Stamp Alliance will be represented at the OCP Summit 2019 by its Founding Members, Artesyn Embedded TechnologiesBel Power SolutionsFlex, and STMicroelectronics.

About the Power Stamp Alliance

The Power Stamp Alliance has been formed to define a standard product footprint and functions that provide a multiple sourced, standard modular board-mounted solution for power conversion for 48Vin to low-voltage, high-current DC-DC applications. These 48V single-stage, direct-conversion DC-DC modules – or ‘power stamps’ – primarily target devices being used in large data centers (e.g. high-performance computers, ASICs, and FPGAs), many of which follow the principles of the Open Compute Project (OCP). The Founding Members of the Power Stamp Alliance are Artesyn Embedded TechnologiesBel Power SolutionsFlex, and STMicroelectronics.

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