industry news
Subscribe Now

Pentek Announces Kintex UltraScale Co-processorJade XMC for Signal Processing Applications

  • Jade Architecture with Xilinx Kintex UltraScale FPGA
  • Provides up to 5520 DSP slices and 1.4 million logic cells
  • Navigator Design Suite for streamlined IP development
  • XMC (VITA 42) with PCIe Gen 3 x8 interface
  • Available in commercial and rugged versions in multiple form factors

UPPER SADDLE RIVER, NJ─March 26, 2018─Pentek, Inc., today introduced the newest member of the Jade™ family of high-performance data converter XMC modules based on the Xilinx Kintex Ultrascale FPGA. The Model 71800 is a co-processor module with an XMC PCI Express Gen 3 interface and general purpose I/O using parallel LVDS and gigabit serial ports.

The Jade Architecture embodies a streamlined approach to FPGA based boards, simplifying the design to reduce power and cost, while still providing some of the highest performance FPGA resources available today. Designed to work with Pentek’s Navigator™ Design Suite of tools, the combination of Jade and Navigator offers users an efficient path to developing and deploying FPGA IP for data and signal processing.

The Model 71800 is pre-loaded with IP modules for DMA engines, a DDR4 memory controller, test signal and metadata generators, data packing and flow control to speed up the development process. The 71800 is available with the Kintex UltraScale KU035, KU060 and KU115, supporting a range of processing power. The majority of the Kintex UltraScale FPGA resources are available for customer installed IP for processing and management of I/O.

Performance IP Cores
“Designers who need to boost DSP processing for an existing system, or wish to develop their own new IP application, can take good advantage of the Model 71800. Not only does it offer up to 5520 DSP slices for plenty of processing horsepower, it also provides well-defined connections to PCIe, DDR4 memory, LVDS I/O and gigabit serial links to support high-performance interfaces,” said Bob Sgandurra, director of Product Management of Pentek. “Advancements in our Navigator tools now make it much easier to integrate custom IP with modules from the Pentek library to develop solutions for very specific needs. A designer’s imagination is the only limitation to the capabilities of this module.”

The Jade Architecture
The Pentek Jade Architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50% when compared the previous FPGA family with equally impressive reductions in cost, power dissipation and weight. As the central feature of the Jade Architecture, the FPGA has access to all data and control paths, allowing direct access to all board resources. A large 5 GB bank of DDR4 SDRAM is available to the FPGA for custom applications. The x8 PCIe Gen 3 link can sustain 6.4 GB/s data transfers to system memory. Eight additional gigabit serial lanes and 38 LVDS general purpose I/O pairs are available for specialized interfaces.

Navigator Design Suite for Streamlined IP Development
Pentek’s Navigator Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek designs and Navigator BSP (Board Support Package) for creating host software applications.

The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be edited in Xilinx’s Vivado tool suite. In addition to the block diagrams, all source code and complete IP core documentation is included. Developers can integrate their own IP along with the Pentek factory-installed functions or use the Navigator kit to completely replace the Pentek IP with their own.  The Navigator FDK Library is AXI-4 compliant, providing a well defined interface for developing custom IP or integrating IP from other sources.

The Navigator BSP contains high-level libraries and drivers for Windows and Linux operating systems. Users can work efficiently using high-level API functions, or gain full access to the underlying libraries including source code. Numerous examples speed development of new applications.

Pre-Configured SPARK System Ready for Immediate Use
With a Pentek 8266 SPARK® PC, 8264 SPARK 6U VPX, or 8267 SPARK 3U VPX development system, work can begin immediately on applications. A SPARK system saves engineers time and expense associated with building and testing a development system and ensures optimum performance of Pentek boards. SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.

Form Factors
The Model 71800 XMC module is designed to operate with a wide range of carrier boards in PCIe, 3U and 6U VPX, AMC, and 3U and 6U CompactPCI form factors, with versions for both commercial and rugged environments.

Pricing and Availability
Designed for air-cooled, conduction-cooled and rugged operating environments, the Model 71800 XMC module with 5 GB of DDR4 SDRAM starts at $8,500 USD. Additional FPGA options are available. Delivery is 10 to 12 weeks ARO.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Introducing QSPICE™ Analog & Mixed-Signal Simulator
Sponsored by Mouser Electronics and Qorvo
In this episode of Chalk Talk, Amelia Dalton and Mike Engelhardt from Qorvo investigate the benefits of QSPICE™ - Qorvo’s Analog & Mixed-Signal Simulator. They also explore how you can get started using this simulator, the supporting assets available for QSPICE, and why this free analog and mixed-signal simulator is a transformational tool for power designers.
Mar 5, 2024
5,879 views