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Imec to Install High NA EUV Imaging and Attosecond Analytical Lab to Probe Lithography down to 8nm pitch

February 26, 2019

SAN FRANCISCO (US), FEBRUARY 26, 2019 — Today, imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, and KMLabs, pioneers and world leaders in ultrafast laser and EUV technology, announce a joint development to create a real-time functional imaging and interference lithography laboratory. This lab will enable imaging in resist on 300mm wafers down to an unprecedented 8nm pitch. Additionally, it will enable time-resolved nanoscale characterization of complex materials and processes, such as photoresist radiation chemistry, two-dimensional materials, nanostructured systems and devices, emergent quantum materials.  

… Read More → "Imec to Install High NA EUV Imaging and Attosecond Analytical Lab to Probe Lithography down to 8nm pitch"

New Video from Mouser’s Generation Robot Series Showcases Exclusive Grant Imahara Panel Discussion from ECIA Executive Conference

February 26, 2019

February 25, 2019 – Mouser Electronics Inc. today released a new video featuring celebrity engineer Grant Imahara’s panel discussion from the 2018 Electronic Components Industry Association (ECIA) Executive Conference. The hour-long video panel discussion, titled “How Robotics … Read More → "New Video from Mouser’s Generation Robot Series Showcases Exclusive Grant Imahara Panel Discussion from ECIA Executive Conference"

MACOM and STMicroelectronics Accelerate GaN-on-Silicon Support for 5G Wireless Network Buildouts

February 26, 2019
  • Wafer supply expansion to enable cost, scale, and industrialization of GaN-on-Silicon for the global 5G network buildout
  • Wide bandgap efficiency and gain to meet 5G antenna range and energy efficiency

Lowell, Massachusetts, and Geneva, Switzerland, February 25, 2019 – MACOM Technology Solutions Holdings, Inc. (NASDAQ: MTSI) (“MACOM”), and STMicroelectronics (NYSE: STM) (“ST”) today announced the 2019 expansion of 150 … Read More → "MACOM and STMicroelectronics Accelerate GaN-on-Silicon Support for 5G Wireless Network Buildouts"

Cadence Drives Release of Alternative EVS Codec Implementation in 3GPP

New codec enables up to 1.6X performance improvement and better battery life for mobile communications applications
February 26, 2019

SAN JOSE, Calif., February 25, 2019—Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it initiated and drove the standardization within 3GPP of an alternative fixed-point Enhanced Voice Services (EVS) codec reference implementation using updated basic operators. 3GPP, a global initiative that provides complete system specifications for cellular telecommunications network technologies, has adopted and released the new codec, which enables more efficient processing and improves battery life by leveraging modern DSP architectures with 64-bit accumulators, single instruction, multiple data (SIMD) and very long instruction word (VLIW) technologies. As part of this effort, Cadence also updated the basic operators incorporated in … Read More → "Cadence Drives Release of Alternative EVS Codec Implementation in 3GPP"

Adesto Takes Ultra-low Power Memory to the Next Level: New FusionHDTM is up to 70% Lower Power than Standard Flash

Devices Make Next-Generation Battery-Powered Smart IoT Products a Reality
February 26, 2019

SANTA CLARA, CA – February 25, 2019 – Adesto® Technologies Corporation (NASDAQ: IOTS), a leading provider of innovative application-specific semiconductors and embedded systems for the IoT era, introduces new FusionHD™ non-volatile memories (NVMs) designed for next-generation consumer and industrial IoT edge devices. FusionHD builds on the Smart IoT feature set of Adesto’s highly successful Fusion family with even more capabilities, patented low-power technology, security features, and increased memory density options.

The FusionHD product line supports the code storage and data logging demands of a wide range of feature-rich wearables, hearables, sensor edge devices and industrial systems. It delivers low power … Read More → "Adesto Takes Ultra-low Power Memory to the Next Level: New FusionHDTM is up to 70% Lower Power than Standard Flash"

Synopsys and Palma Ceia SemiDesign Collaborate to Develop a Complete Hardware/Software NB-IoT IP Solution

Combination of Synopsys' ARC EM Processor with Palma Ceia's Silicon-Proven RF Transceiver Facilitates LTE Cat NB2 SoC Implementations
February 26, 2019

MOUNTAIN VIEW, Calif., and SANTA CLARA, Calif., Feb. 25, 2019 /PRNewswire/ — 

Highlights:

Renesas Electronics Accelerates Automotive ECU Integration with World’s First 28nm Cross-Domain Flash MCU Featuring Virtualization

RH850/U2A MCU with Virtualization Enables the Integration of Multiple Application Software with Different Levels of Functional Safety in a Single Chip
February 26, 2019

Düsseldorf, February 25, 2019 – Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced the world’s first (Note 1) microcontroller (MCU) with embedded flash that integrates a hardware-based virtualization-assisted function while maintaining the fast, real-time performance of the RH850 products. This hardware-based virtualization assist technology can support up to ASIL D (Note 2) level of functional safety, providing greater levels of system integration. The … Read More → "Renesas Electronics Accelerates Automotive ECU Integration with World’s First 28nm Cross-Domain Flash MCU Featuring Virtualization"

Cadence Tools and IP Optimized for New Arm Neoverse N1 Platform to Advance the Cloud-to-Edge Infrastructure Market

February 26, 2019

Highlights:
•       Cadence delivers 7nm digital implementation and signoff RAK for the development of Arm Neoverse N1-based designs
•       Cadence Verification Suite and its engines enhance verification throughput for engineers creating Neoverse N1-based designs
•       Cadence DDR4 PHY IP, CCIX IP, and PCIe 4.0 PHY IP integrated and with Neoverse N1 SoC, driving key I/O interfaces to peak levels of performance
•       Arm Neoverse N1 System Design Platform and board based on Neoverse N1 platform and Cadence IP was implemented and verified using Cadence tools in support of CCIX cache coherency for asymmetrical compute acceleration

… Read More → "Cadence Tools and IP Optimized for New Arm Neoverse N1 Platform to Advance the Cloud-to-Edge Infrastructure Market"

Pixus Offers New Configurations of 6U OpenVPX Backplanes

February 25, 2019

Waterloo, Ontario  —  Feb 22, 2019 –  Pixus Technologies, a provider of embedded computing and enclosure solutions, has released new OpenVPX backplanes for 6U applications.  The designs include a 9-slot, 6-slot power and ground, 5-slot, and a 1-slot development backplane. 

The 5-slot 6U OpenVPX backplane from Pixus has a BKP6-CEN05-11.2.5 profile. It features PCIe Gen3 speed performance.  For development applications, Pixus now offers power and ground only backplanes.  This allows signals to pass through … Read More → "Pixus Offers New Configurations of 6U OpenVPX Backplanes"

Graphcore Selected 16nm FinFet ESD Solutions from Sofics for its Transformative Artificial Intelligence Processor

Silicon proven IP path significantly reduces risk, time-to-market and overall cost
February 25, 2019

Belgium, February 26, 2019 – Graphcore (www.graphcore.ai), the technology company that has developed a completely new type of processor, the Intelligence Processing Unit (IPU), which lets artificial intelligence (AI) innovators create next generation AI applications, selected TakeCharge® technology from Sofics bvba of Belgium (www.sofics.com) to protect its Colossus GC2 IPU from electrostatic discharge (ESD). Sofics is a leading semiconductor integrated circuit IP provider.

< … Read More → "Graphcore Selected 16nm FinFet ESD Solutions from Sofics for its Transformative Artificial Intelligence Processor"
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