Avery Design Systems PCI Express VIP Enables eTopus SerDes IP and Next-Generation ASIC and Chiplet applications to Achieve Compliance and High-Speed Connectivity
Tewksbury, MA., June 21, 2022 — Avery Design Systems, a leader in functional verification solutions, today announced it has been chosen by eTopus as its verification IP solution partner for eTopus PCIe Gen 1-6 and 800G/400G Ethernet solutions and 112G SerDes IP for next-generation ASIC and Chiplet applications.
eTopus designs ultra-high speed mixed-signal semiconductor solutions for high-performance computing and data center applications. Its high speed, low latency, low power connectivity IP supports leading-edge PCIe and Ethernet connectivity and uses Avery’s PCI Express Verification IP (VIP) to ensure its IP is compliant prior to silicon validation.

