SANTA CLARA, Calif., May 11, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that it will demonstrate the latest design and test innovations for advanced RF and microwave research, development and manufacturing at the 2010 IEEE MTT-S International Microwave Symposium (IMS), May 25 – 27, at the Anaheim Convention & Exhibition Center, Booth 924.

“Agilent’s design and test solutions provide engineers with the tools they need to accelerate their research, design and development in RF, microwave and millimeter-wave electronics,” said Barry Alcorn, U.S. marketing program manager in Agilent’s Electronic Measurement Group. “At IMS 2010, we’re showing the latest products and application … Read More → "Agilent Technologies to Showcase Latest RF/Microwave Design and Test Products at 2010 International Microwave Symposium"

MOUNTAIN VIEW, Calif. and SHANGHAI, May 13 /PRNewswire-Asia/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design and manufacturing and Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI and SEHK: 0981.HK), one of the leading semiconductor foundries in the world, today announced the immediate availability of Synopsys’ silicon-proven and USB logo-certified DesignWare(R) USB 2.0 nanoPHY intellectual property (IP) for SMIC’s 65 nanometer (nm) low- leakage (LL) process technology. As a leading provider of complete IP solutions for the USB 2.0 … Read More → "Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC’s 65 Nanometer LL Process Technology"

Kirkland, WA – May 11, 2010 – DRC Computer and Impulse Accelerated Technologies today announced that the Impulse C™-to-FPGA tools have been integrated with the DRC Accelium™ coprocessor card, enabling software engineers to fully access hardware acceleration using familiar C programming methods. This integration provides C-language control of I/O, memory, streams and signals at the hardware level, allowing applications to leverage the high parallelism possible in FPGAs for higher performance.

FPGAs are recognized as powerful accelerators for non-sequential algorithms, and have been successfully deployed by engineering teams … Read More → "Software Developers Get New High Performance Computing C-to-FPGA Tools"

SANTA CLARA, Calif., May 6 /PRNewswire/ — NextOp Software, Inc. today announced BugScope, the industry’s first assertion synthesis product to synthesize high quality assertions and functional coverage properties from the Register Transfer Level (RTL) design and testbench. These properties enhance existing verification flows by helping design and verification engineers uncover corner-case bugs, expose functional coverage holes and increase verification observability. 

BugScope automatically generates assertions and functional coverage in IEEE standard formats such as SVA, PSL or synthesizable Verilog. … Read More → "NextOp Announces BugScope™ Assertion Synthesis for Progressive, Targeted Verification"

SANTA CLARA, CA, –  May 5, 2010 – eASIC Corporation, a provider of NEW ASIC devices, today announced the immediate availability of its eTools 8.1 Design Suite for implementing 45nm Nextreme-2 designs. The eTools 8.1 tool suite delivers a robust ASIC grade design flow with the simplicity and ease of design that is normally associated with FPGA design tools. New features and enhancements in eTools 8.1 enable designers to reduce overall design time by up to 40% while increasing design performance by up to 30% compared to the previous eTools 8.0 suite.</ … Read More → "eASIC eTools 8.1 Design Suite Reduces Design Time by 40%"

MOUNTAIN VIEW, Calif., May 5 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® Ethernet Quality-of-Service (QoS) Controller IP which implements the new IEEE specifications for audio video bridging (AVB) features. The DesignWare Ethernet IP solution supports the new IEEE 802.1AS and 802.1-Qav version D6.0 specifications. These specifications enable efficient networking of streaming audio video (AV) applications through IEEE 802.1 networks found in consumer electronics, automotive … Read More → "Synopsys Unveils Ethernet Controller IP With New Audio Video Bridging Feature"

SUNNYVALE, CALIF. and ACTON, MASS. –– May 4, 2010 –– Vivante Corporation, an embedded graphics technology leader, and Read More → "Vivante Adopts Carbon Design Systems’ System-Level Modeling, IP Deployment Tools"

MOUNTAIN VIEW, Calif., May 3 — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® MIPI® 4G DigRF(SM) Master Controller IP. By complementing its current silicon-proven DesignWare MIPI 3G DigRF Controller and PHY IP, Synopsys becomes the first vendor to offer a comprehensive IP portfolio for both the MIPI DigRF v3 and v4 standards. The configurable MIPI 4G DigRF Master Controller is compliant to the … Read More → "Synopsys Launches Industry’s First MIPI® DigRF(SM) v4 IP"

SANTA CLARA, Calif., April 27, 2010 — Agilent Technologies Inc. (NYSE: A) today introduced the InfiniiMax III oscilloscope probing system with industry-leading bandwidth of 30 GHz. Four new probe amplifier models offer bandwidths from 16 to 30 GHz. A wide range of probe heads allows connection using a browser, ZIF (zero insertion force) tip, 2.92-mm or 3.5-mm SMA cable or solder-in tips. These probing solutions complement the new Infiniium 90000 X- Series oscilloscopes with their industry-leading bandwidth of 32 GHz.

“The InfiniiMax III probing system represents the convergence of new technologies, state-of-the-art design methodologies, and our experience from developing two generations of award-winning probe systems,” … Read More → "Agilent Technologies Introduces World’s Fastest Oscilloscope Probing System with 30 GHz Bandwidth"

MOUNTAIN VIEW, Calif., April 28, 2010 — Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of the high performance DesignWare(r) Universal DDR Protocol and Memory Controllers, both supporting the DDR2, DDR3, Mobile DDR and LPDDR2 SDRAM standards. The DesignWare Universal Memory Controller helps reduce both the latency and silicon area by up to 50 percent compared to Synopsys’ previous generations of DDR memory controllers thus improving the DRAM interface performance and reducing overall chip costs. The DesignWare Universal Protocol Controller provides efficient DDR control and protocol translation … Read More → "New Synopsys Universal DDR Controllers improve performance and reduce cost of embedded DRAM interfaces"