Synopsys Announces DesignWare DDR4 Memory Interface IP
MOUNTAIN VIEW, Calif., Sept. 18, 2012 /PRNewswire/ —
Highlights:
- Synopsys expands its industry-leading DesignWare® DDR Memory Interface IP family to include support for DDR4 SDRAMs
- Backward compatibility with DDR3 and LPDDR2/3 mobile SDRAMs gives SoC designers flexibility as they transition from one SDRAM standard to the next
- New DDR4 IP offers more features with up to 50 percent lower latency than the previous generation
- DDR4 memory controller and PHY are connected by a standard DFI 3.1 interface to streamline connections to custom PHYs and controllers
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