News – Page 1857 – EEJournal

New Module from Telit to Expand Reach of Flagship Family with Latest 2G Chipset Technology

May 30, 2013

LONDON and RALEIGH, N.C. – May 30, 2013 – Telit Wireless Solutions, a global provider of high-quality machine-to-machine (M2M) solutions, products and services, today announced the introduction of its third generation 2G-cellular module in the company’s popular xE910 product family. The GE910-QUAD V3 is the company’s top recommended quad-band GSM/GPRS Class-10 product for integrators and OEMs starting or upgrading designs going forward. Based on the market’s latest release 2G chipset, the new module is slated for long-term availability protecting design investments. The product, which also incorporates a … Read More → "New Module from Telit to Expand Reach of Flagship Family with Latest 2G Chipset Technology"

Atrenta and Mentor Collaborate on SoC Power Signoff

May 30, 2013

SAN JOSE, Calif — May 30, 2013 — Atrenta Inc., the leading provider of SoC Realization solutions for the semiconductor and consumer electronics industries, today announced that it is collaborating with Mentor Graphics Corporation (NASDAQ: MENT) to enable accurate, signoff quality power estimation at the register transfer level (RTL) for the entire system on chip (SoC) device. The project aims to radically improve SoC design efficiency by facilitating RTL power estimation for designs in excess of 50 million gates, running actual software scenarios over hundreds of … Read More → "Atrenta and Mentor Collaborate on SoC Power Signoff"

ATopTech Introduces New Technologies for Aprisa and Apogee Physical Design Solutions at DAC 2013

May 30, 2013

SANTA CLARA, CA – May 30, 2013 — ATopTech, the leader in next generation physical design solutions that address the challenges of designing integrated circuits (ICs), will introduce significant technology additions and performance gains in software release AP 13.02 (release 2.0) for itsAprisa^TM and Apogee^TM tools at the 50^th DAC in Austin, Texas. Aprisa is the company’s complete place and route (P&R) engine, including … Read More → "ATopTech Introduces New Technologies for Aprisa and Apogee Physical Design Solutions at DAC 2013"

EDA Veteran Launches G-Analog to Provide Next-Generation Characterization Software

May 30, 2013

SAN JOSE, Calif. –– May 28, 2013 – G-Analog Design Automation, a new EDA startup, is formally launching its operations to the public and will be focus on the development and delivery of its next-generation simulation and characterization software, GChar, for custom integrated circuits (ICs).

G-Analog was organized and incorporated in May, 2012 by Dr. Jeff Tuan, President and CEO, and is a privately funded electronic design automation (EDA) company. Before G-Analog, Dr. Tuan was Deputy Director at Chartered Semiconductor and GlobalFoundries where he managed IP and test chip development. Dr. Tuan was one of the co-founders of Nassda … Read More → "EDA Veteran Launches G-Analog to Provide Next-Generation Characterization Software"

TI delivers industry’s most highly integrated piezo haptic driver for realistic HD touchscreen experience

May 30, 2013

DALLAS (May 30, 2013) – Texas Instruments Incorporated (TI) (NASDAQ: TXN) today introduced the industry’s most highly integrated piezo haptic driver for high-definition (HD) consumer, automotive and industrial touchscreen applications. The DRV2667 features a digital interface, integrated 15-V to 105-V boost converter, power diode, and 40-V to 200-V peak-to-peak (Vpp) fully-differential amplifier, resulting in a complete single-chip solution size that is less than half the size of competitive solutions. The DRV2667 also features an I2C controlled digital playback engine that relieves the host processor from haptic effects generation. For more … Read More → "TI delivers industry’s most highly integrated piezo haptic driver for realistic HD touchscreen experience"

Xilinx and TSMC Team to Enable Fastest Time-to-Market and Highest Performance FPGAs on TSMC’s 16-nanometer FinFET

May 30, 2013

SAN JOSE, Calif. and HSINCHU, Taiwan – May 29, 2013 – Xilinx Inc. (NASDAQ: XLNX) and TSMC (TWSE: 2330, NYSE: TSM) announced that they are teaming together to create the fastest time-to-market and highest performance FPGAs to be built on TSMC’s 16-nanometer FinFET (16FinFET) process, a program Xilinx calls ‘FinFast.’ The two companies are providing dedicated resources as part of a ‘one-team’ approach, and will work together to co-optimize the FinFET process with Xilinx’s UltraScale™ architecture. The program will deliver 16FinFET test chips later in 2013 and first product in 2014.

The companies are also engaged in … Read More → "Xilinx and TSMC Team to Enable Fastest Time-to-Market and Highest Performance FPGAs on TSMC’s 16-nanometer FinFET"

ANSYS Subsidiary’s Customers Present Methodologies for Ultra-low-power, High-performance, Reliable and Cost-optimized Designs for Mobile, Custom Analog, and Automotive Applications

May 30, 2013

ANSYS subsidiary Apache Design, Inc. will exhibit its industry-leading simulation software platforms and methodologies that meet integrated circuit (IC) power, performance and price demands for low-power mobile, high-performance computing, consumer and automotive electronics at the Design Automation Conference (DAC).

Where: Design Automation Conference, Austin Convention Center, Austin, TX, Booth #1346

When: Monday, June 3 through Wednesday, June 5, from 9:00 a.m. to 6:00 p.m.

< … Read More →

CaetanoBus Streamlines its Electrical Design Processes Using Capital Software from Mentor Graphics

May 30, 2013

WILSONVILLE, Ore., May 30, 2013—Mentor Graphics Corp. (NASDAQ: MENT) and CaetanoBus today announced successful application of the company’s Capital® software suite to the development of CaetanoBus’ flagship C5 coach. The C5 coach offers a wide range of configuration options and includes innovative electrical/electronic systems that significantly boost efficiency, safety, and reliability. The sophisticated nature of these systems drives challenges for the coach’s electrical design, particularly with respect to systems integration, design validation and configuration management. To solve these challenges, the Portugal-based company used the … Read More → "CaetanoBus Streamlines its Electrical Design Processes Using Capital Software from Mentor Graphics"

QuickLogic’s New “CUB” System Enables Easy Evaluation of ArcticLink III VX for Customer Designs

May 30, 2013

Multi-function boards support all variants of the ArcticLink III VX and BX families
Provides fast and easy prototyping and compatibility testing with common processor
boards & displays
Accelerates VEE and DPO evaluation time

Sunnyvale, CA – May 30, 2013 – QuickLogic Corporation (NASDAQ: QUIK), the innovator of ultra-low-power programmable Customer Specific Standard Products (CSSPs), today announced the development of the Customer Use Board (CUB) System, which provides for easy evaluation and validation of ArcticLink® III VX and BX … Read More → "QuickLogic’s New “CUB” System Enables Easy Evaluation of ArcticLink III VX for Customer Designs"

CORMORAN Project Exploring Ways to Improve Cooperation In and Between Wireless Body Area Networks

May 30, 2013

GRENOBLE, France – May 30, 2013 – CEA-Leti today announced it is coordinating the multi-partner CORMORAN project focusing on new forms of cooperation in and between wireless body area networks. Targeted applications include coordinated navigation of groups in buildings or large-scale motion capture for gaming, sports and healthcare.

Wireless body area networks (WBANs), consisting of wearable sensors or devices, already are being commercialized in emerging markets as diverse as security, rescue, health, gaming or intelligent clothing. If deployed in very large segments of the population, they might eventually be a key component of the Internet of Things (IoT) and form the … Read More → "CORMORAN Project Exploring Ways to Improve Cooperation In and Between Wireless Body Area Networks"

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