industry news archive
Subscribe Now

Zarlink’s Timing over Packet Products Successfully Interoperate at ISPCS 2009 “Plug-fest”

Zarlink’s Timing over Packet (ToP) devices are interoperable with all equipment manufacturers using the latest IEEE 1588-2008 protocol

OTTAWA, CANADA, October 15, 2009 – Zarlink Semiconductor (TSX: ZL) today announced its portfolio of IEEE 1588 Timing over Packet (ToP) products successfully passed comprehensive interoperability testing with a range of equipment manufacturers. Independent testing was completed during “plug-fest” at the 2009 International IEEE Symposium on Precision Clock Synchronization (ISPCS) for Measurement, Control and Communication in Brescia, Italy.

Plug-fest is an opportunity for suppliers and manufacturers to demonstrate system-wide clock synchronization and operation of … Read More → "Zarlink’s Timing over Packet Products Successfully Interoperate at ISPCS 2009 “Plug-fest”"

Itron Selects Accent Single Chip Solution for Smart Metering Applications

Highly Integrated, Customized System-on-Chip Offering to Dramatically Reduce System BOM and Increase Performance Versus Standard Products

State-of-The-Art Design to Incorporate ARM® CortexTM-M3 Processor and complete ZigBeeTM PRO Functionality

MILAN & LIBERTY LAKE, Wash.–(BUSINESS WIRE)–Accent S.p.A., a leading fabless SoC provider offering highly differentiated platform-based System-on-Chip (SoC) solutions, and Itron (Nasdaq:ITRI), the industry leader in advanced metering technology, today announced Itron’s selection of Accent to supply a newly developed integrated circuit for its OpenWay® CENTRON® smart meter product line. The new design will integrate the … Read More → "Itron Selects Accent Single Chip Solution for Smart Metering Applications"

EVE to Exhibit at ARM Techcon3

Will Highlight ZeBu-Server’s Scalability, Affordability, Speed, Debugging Capabilities

ARM Techcon3
Booth #614
SAN JOSE, Calif.–(BUSINESS WIRE)–EVE, the leader in hardware/software co-verification and developer of ZeBu-Server, a scalable and affordable emulation system, will exhibit at ARM® Techcon3 (Booth #614) October 21-22 at the Santa Clara Convention Center in Santa Clara, Calif.

Capable of handling up to one-billion application specific integrated circuit (ASIC) gates at speeds reaching 30 megahertz (MHz), ZeBu-Server comes equipped with a wide array of tools that enables debugging at multiple levels of abstraction. The ZeBu Smart Debug … Read More → "EVE to Exhibit at ARM Techcon3"

EMA Partners with Aldec to Provide Cadence OrCAD Users a Complete FPGA Design Solution

Rochester, NY (October 14, 2009) – EMA Design Automation™ (, one of the world’s largest Electronic Design Automation Value Added Resellers, announced today that it has partnered with Aldec® as an Authorized North American Distributor of Aldec Active-HDL™. This partnership enables EMA to deliver a comprehensive FPGA design environment to Cadence® Design Systems OrCAD® customers. “FPGAs are ubiquitous in electronic design due to their flexibility and time to market advantages,” said Manny Marcano, president and CEO of EMA Design Automation. “With these advantages comes the challenge of designing, … Read More → "EMA Partners with Aldec to Provide Cadence OrCAD Users a Complete FPGA Design Solution"

The International Function Point Users Group announces the release of Version 4.3 of the Counting Practices Manual

(PRINCETON JUNCTION, NJ; October 13, 2009) – The International Function Point Users Group (IFPUG) announced that it has released the latest version of the IFPUG Counting Practices Manual (CPM). The CPM is the body of knowledge used by function point analysts to measure the functional size of applications and projects for benchmarking and estimating world-wide for many domains and business areas. The CPM is the “must have” document for those seeking to become Certified Function Point Specialists.

The CPM is an internationally approved standard under ISO/IEC 14143-1 Information Technology – Software Measurement. This revision to the … Read More → "The International Function Point Users Group announces the release of Version 4.3 of the Counting Practices Manual"

Methodics Announces Support for Subversion 1.6 Design Data Version Control System

VersIC – the industry’s first tool suite to enable true global IC design collaboration

October 2009 – Methodics LLC, a leading developer of design data management (DM) tools for integrated circuit (ICs), today announced that its VersIC tool suite supports the latest release of the Subversion® version control system. The Subversion 1.6 release from the Subversion open-source community delivers powerful new features, including the ability to detect tree conflicts, enhanced file system storage mechanisms that reduce repository space requirements, authentication data handling improvements and improved management of credentials. The VersIC platform integrates … Read More → "Methodics Announces Support for Subversion 1.6 Design Data Version Control System"

Artisan launches Artisan Studio Reviewer

– Cuts design time by up to 30% by automating UML/SysML/UPDM model checking

– Accelerates safety-critical applications design and improves design quality

Washington DC, USA and Cheltenham, UK – 14th October 2009. Artisan® Software Tools, the world’s largest independent supplier of industrial-grade, collaborative modeling tools for complex, mission and safety-critical embedded systems and software, has launched Artisan Studio Reviewer™, a powerful design reviewer that automates the otherwise manual task of checking UML, SysML and even UPDM models for completeness, correctness and consistency. With applications development deadlines continually shortening, Artisan Studio Reviewer significantly … Read More → "Artisan launches Artisan Studio Reviewer"

Sidense OTP Enables Security of Wireless Video Transmissions

Highly secure OTP memory used for WHDI key storage on AMIMON WHDI™ chips

Ottawa, Canada – October 13, 2009 – Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) IP cores, today announced that AMIMON, the market leader in wireless High Definition (HD) semiconductor solutions, is employing Sidense’s 1T-Fuse™-based one-time programmable (OTP) memory macro technology in chips used for uncompressed wireless high-definition video connectivity. The chips are used in AMIMON’s second-generation WHDI™ (Wireless Home Digital Interface) transmitter and receiver products designed for wireless delivery of full uncompressed 1080 … Read More → "Sidense OTP Enables Security of Wireless Video Transmissions"

Rapid Bridge Technology Selected by AppliedMicro for Multi-Platform Advanced Nanometer System-on-Chip Development

AppliedMicro Taps LiquidSoC to Lower Systems Risk, Cost and Time-to-Market

SAN DIEGO–(BUSINESS WIRE)–Rapid Bridge, an innovator in advanced semiconductor design and development processes, announced today that its LiquidSoC™ has been selected by Applied Micro Circuits Corporation (NASDAQ: AMCC) for a multi-platform, advanced nanometer system-on-chip (SoC) engagement.

LiquidSoC – A Systems Approach to Design

Rapid Bridge’s Liquid platforms provide an entirely new approach to IC development that inherently improves the performance of the SoC building blocks. Developed from the ground up, Rapid Bridge’s SoC platforms, or … Read More → "Rapid Bridge Technology Selected by AppliedMicro for Multi-Platform Advanced Nanometer System-on-Chip Development"

Synopsys introduces Synphony High Level Synthesis

Unique M-language and model-based solution delivers up to 10X higher productivity for communications and multimedia system designers

MOUNTAIN VIEW, Calif., October 12, 2009 – Synopsys, Inc. (Nasdaq:SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced its Synphony HLS (High Level Synthesis) solution that integrates M-language and model-based synthesis to deliver up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications. Synphony HLS creates optimised RTL for ASIC and FPGA implementation, architecture exploration and rapid prototyping. In addition, Synphony HLS complements C/ … Read More → "Synopsys introduces Synphony High Level Synthesis"

featured blogs
Oct 19, 2021
Learn about key roadblocks to improve ADAS systems & higher levels of autonomous driving, such as SoC performance, from our 2021 ARC Processor Virtual Summit. The post Top 5 Challenges to Achieve High-Level Automated Driving appeared first on From Silicon To Software....
Oct 19, 2021
Today, at CadenceLIVE Europe, we announced the Cadence Safety Solution, a new offering targeting safety-critical applications and featuring integrated analog and digital safety flows and engines for... [[ Click on the title to access the full blog on the Cadence Community si...
Oct 13, 2021
How many times do you search the internet each day to track down for a nugget of knowhow or tidbit of trivia? Can you imagine a future without access to knowledge?...
Oct 4, 2021
The latest version of Intel® Quartus® Prime software version 21.3 has been released. It introduces many new intuitive features and improvements that make it easier to design with Intel® FPGAs, including the new Intel® Agilex'„¢ FPGAs. These new features and improvements...