News – Page 1674 – EEJournal

Pulsic Introduces First Complete Automated Layout System for Transistor-Level Analog and Custom-Digital Design: Animate

May 21, 2014

SAN JOSE, CA – May 21, 2014 — Existing approaches to automating analog and custom digital integrated circuit (IC) designs have attempted to improve on portions of the design flow, but have not managed to generate “manual quality” layout without significant user intervention. Pulsic, the premier provider of innovative physical design tools for custom design automation, has drawn on over a decade of experience helping leading-edge customers with physical design challenges to deliver a completely automated solution that overcomes the problem of ‘not-as-good-as-manual’ analog and custom design layout.

Pulsic Animate™ is the first complete automated layout system built ‘from the ground … Read More → "Pulsic Introduces First Complete Automated Layout System for Transistor-Level Analog and Custom-Digital Design: Animate"

ASSET and Synopsys collaborate on proof-of-concept demonstrating an IEEE P1687 IJTAG tools flow

May 21, 2014

Richardson, TX (May 21, 2014) ?ASSET® InterTech (www.asset-intertech.com), the leading supplier of tools for embedded instrumentation, today announced it has collaborated with Synopsys, Inc., a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, on a proof-of-concept case study demonstrating the viability of an IJTAG tools ecosystem. Tools are needed to insert and synthesize IEEE P1687 IJTAG embedded instruments into chips and then access those instruments to operate … Read More → "ASSET and Synopsys collaborate on proof-of-concept demonstrating an IEEE P1687 IJTAG tools flow"

AMD Embeds Intelligent, Interactive and Immersive Experiences with 2nd Generation AMD Embedded R-Series APUs and CPUs

May 20, 2014

Macao, China — G2E — May 20, 2014 — AMD (NYSE: AMD) today announced the 2nd generation AMD Embedded R-series accelerated processing unit (APU) and CPU family (previously codenamed “Bald Eagle”) for embedded applications. The new solutions are targeted at gaming machines, medical imaging, digital signage, industrial control and automation (IC&A), communications and networking infrastructure that require industry-leading compute and graphics processing technology.

“When it comes to compute performance, graphics performance and performance-per-watt, the 2nd generation AMD Embedded R-series family is unique in the embedded market,” said Scott Aylor, corporate … Read More → "AMD Embeds Intelligent, Interactive and Immersive Experiences with 2nd Generation AMD Embedded R-Series APUs and CPUs"

Cadence and ARM Expand Collaboration for 64-bit Processor Designs

May 20, 2014

EDA Technology Access Agreement gives Cadence access to ARMv7 and ARMv8-A architecture-based processor IP, ARM® Mali™ GPUs, System IP and physical libraries to enable tools optimized for these IPs and the development of designs achieving the required power, performance and area (PPA)
First such agreement for ARM’s 64-bit v8 architecture, which includes the ARM Cortex®-A50 processor series
Tighter integration of Cadence tools with ARM technology for easier SoC design, verification and implementation, helping to shorten the time to market.

SAN JOSE, Calif., Read More → "Cadence and ARM Expand Collaboration for 64-bit Processor Designs"

Qt 5.3 launches delivering enhanced cross-platform application development performance and user experience

May 20, 2014

May 20, 2014 —Qt, the leading cross-platform application and user interface (UI) development framework is now available under version Qt 5.3. With Qt, developers can easily develop cross-platform applications and simply reuse code to target all the major desktop, embedded and mobile platforms. Qt 5.3 packs in numerous new features and improvements that enables the simple and effortless development of applications and connected devices that run anywhere on any device, on any operating system making the end users’ life easier. To lower the barrier of entry for application development, Digia is also introducing a … Read More → "Qt 5.3 launches delivering enhanced cross-platform application development performance and user experience"

Cadence Offers Immediate Availability of DDR4 PHY IP on TSMC 16nm FinFET Process

May 20, 2014

SAN JOSE, Calif., May 19, 2014—Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced immediate availability of DDR4 PHY IP (intellectual property) built on TSMC’s 16nm FinFET process. The combination of 16nm technology and Cadence’s innovative architecture helps customers realize the maximum performance of the DDR4 standard, which is specified to scale up to 3200Mbps, as compared to today’s maximum of 2133Mbps for both DDR3 and DDR4 technologies. This technology enables server, network switching, storage fabric and other systems on chip (SoCs) requiring high-memory bandwidth to design-in Cadence® DDR4 PHY IP now … Read More → "Cadence Offers Immediate Availability of DDR4 PHY IP on TSMC 16nm FinFET Process"

65V, 2.2MHz Synchronous Step-Down Switcher Delivers 2A & Needs Only 2.5µA of IQ

May 20, 2014

MILPITAS, CA – May 20, 2014 – Linear Technology Corporation announces the LT8620, a 2A, 65V input capable synchronous step-down switching regulator. Synchronous rectification delivers efficiency … Read More → "65V, 2.2MHz Synchronous Step-Down Switcher Delivers 2A & Needs Only 2.5µA of IQ"

Acromag’s New Rugged COM Express Type 6 Modules Feature Intel Core i7/i5 4th-Gen CPUs and Removable Memory

May 20, 2014

WIXOM, Mich., May 20, 2014 /PRNewswire/ — Acromag’s XCOM-6400 COM Express Module provides a high-performance processor in a package that is small, light, and very power-efficient. The XCOM-6400 is a Type 6 Basic COM Express module that is available with a choice of Intel’s 4th-generation Core i7 or i5 Haswell CPU and Intel’s 8-Series QM87 PCH chipset, formerly known as Lynx Point. The XCOM-6400 provides heat sink capabilities not available … Read More → "Acromag’s New Rugged COM Express Type 6 Modules Feature Intel Core i7/i5 4th-Gen CPUs and Removable Memory"

Augmented World Expo Releases New Details on Hackathon

May 20, 2014

Santa Clara, CA, May 12, 2014– Augmented World Expo Hackathon 2014. Augmented World Expo has released further details on the highly anticipated wearable Hackathon, which is a new addition to AWE, taking place May 26-27, 2014. The challenge is attracting hundreds of developers to compete for fun and prizes as they meet other developers and learn more about wearable devices.

This free event – produced in partnership with Augmate and sponsored by Epson and Arqetype – is open to all developers, both novice and advanced, and takes place at the Santa Clara Convention Center in Santa … Read More → "Augmented World Expo Releases New Details on Hackathon"

Cadence Extends Spectre XPS to Support Mixed-Signal Designs

May 20, 2014

Cadence Design Systems, Inc., a leader in global electronic design innovation, today announced that its high-performance FastSPICE simulator, Spectre® XPS (eXtensive Partitioning Simulator) now supports transistor-level mixed-signal design. Delivering up to 10X faster throughput versus previous advanced-SPICE solutions, Spectre XPS enables faster and more comprehensive simulation for large, complex designs including mixed-signal designs.

Built on the leading Cadence® Spectre simulation platform, Spectre XPS enables the easy re-use of models, stimulus, analysis and overall methodology, thereby reducing support costs while improving time to production. The unified Spectre simulation platform spans SPICE, advanced SPICE, RF and FastSPICE technologies, enabling … Read More → "Cadence Extends Spectre XPS to Support Mixed-Signal Designs"