Santa Clara, Calif., Feb 17, 2015 – Achronix Semiconductor Corporation today announced that the Speedster22i family of FPGAs has transitioned into production status. The Speedster22i FPGA family is built on Intel’s 22nm Tri-Gate process technology and consists of three device members, two of which have entered production – the HD680 with 660 thousand effective look-up-tables (LUTs) and the HD1000 with 1 million effective LUTs.

Speedster22i FPGAs combines the most advanced production process technology node with the greatest amount of hardened interface IP currently available. The HD1000 has two 100 Gigabit Ethernet controllers, two 120 gigabit Interlaken controllers, two PCIe Gen3 x8 … Read More → "Achronix Announces Production Availability of Speedster22i Product Family"

SAN JOSE, Calif., Feb. 17, 2015 /PRNewswire/ — Xilinx, Inc. (NASDAQ: XLNX) and BEEcube today announced they have delivered the world’s first millimeter wave (mmWave) prototyping platform solution for pioneering development of 5G applications. Xilinx’s newest 256QAM 500MHz mmWave modem IP coupled with the BEEcube BEE7 baseband platform provides a complete “out of the box” solution addressing the 60GHz backhaul market thereby enabling designers to work on innovative mmWave designs immediately.

“5G will increase cellular network capacity by a factor of 1,000 … Read More → "Xilinx and BEEcube Deliver World’s First Millimeter Wave Prototyping Platform Solution for Pioneering Development of 5G Applications"

Santa Clara, Calif., Feb 18, 2015 – Achronix Semiconductor Corporation today announced the immediate availability of its latest tool suite, the Achronix CAD Environment (ACE) version 5.4, which now contains support for incremental compilation.

Incremental compilation dramatically increases productivity by allowing FPGA designers to compile portions of their design that have changed while leaving the remainder of their design intact. Incremental changes to a design can be passed through the entire tool flow efficiently, providing up to 58% speed-up compared to a non-incremental flow.

Compilation times are a critical consideration for FPGA designers. During both the design and prototype phases … Read More → "Achronix Dramatically Reduces Compile Times with New Incremental Compile Support in its ACE Design Tools"