Leuven (Belgium) – June 15, 2016 – Today, at the 2016 Symposia on VLSI Technology & Circuits, nano-electronics research center imec presented junction-less gate-all-around (GAA) nanowire (NW) FETs built in lateral and vertical configurations. With their simplified processing, improved reliability, reduced low frequency noise and lower IOFF values, they are an attractive option for advanced logic, low power circuits and analog/RF applications. Moreover, they enable a simpler path for considerable SRAM scaling via the stacking of vertical devices.
GAA-NWFETs -with the gate fully wrapped around the device body for optimum electrostatics control- are considered one of the most … Read More → "Imec demonstrates Junction-less Gate-All-Around Lateral and Vertical Nanowire FET Devices"