Open-Silicon Tapes Out Industry’s First High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in 16nm FF+
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2Gbps per pin data rate at longer trace lengths
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Available for 2.5D ASIC design starts and also as a licensable IP subsystem
Milpitas, CA, September 28, 2016 – Open-Silicon, a system-optimized ASIC solution provider, today announced it has successfully taped out the industry’s first High Bandwidth Memory (HBM2) IP subsystem in TSMC’s 16nm FF+ process in combination with TSMC’s CoWoS® 2.5D silicon interposer technology. This full IP subsystem … Read More → "Open-Silicon Tapes Out Industry’s First High Bandwidth Memory (HBM2) IP Subsystem Solution for 2.5D ASICs in 16nm FF+"

