industry news
Subscribe Now

Pacific Tech 2022 Offers Tech Opportunities

Funding and commercialization possibilities at biannual event

HONOLULU, Aug. 18, 2022 (GLOBE NEWSWIRE) — Pacific Tech 2022 (formerly known as the Hawai’i SBIR Conference) is happening in Honolulu in 2022. This updated, biannual event brings Pacific region technology and engineering organizations/companies together with government customers, investors, prime contractors, federal SBIR/STTR program representatives, and other supporting government agencies. Innovative tech companies will have an opportunity to meet with potential clients/customers and learn about America’s Seed Fund (SBIR/STTR programs), as well as how they can best use new funding and tech commercialization opportunities.

The Hawai’i Convention Center is the home to this year’s conference from Oct. 24-26, 2022. More than 150 attendees from across the Pacific region and the West Coast, as well as federal agency representatives, are expected.

This year’s title sponsor is Decisive Point, a venture capital firm investing in deep-tech innovations for security, health, energy, and infrastructure. Decisive Point’s mission is to solve tough problems that matter, supporting mission-driven startups and amplifying investments with public R&D funding.

This is a unique opportunity for Pacific Region tech and engineering companies, especially small businesses, to offer new and innovative technology solutions to government challenges they’re unable to solve internally. Hawai’i’s geographic location makes it a critical part of U.S. military strategic operations, as well as the ever-expanding military presence in the islands, and provides opportunities for the public and different branches of the military to discuss partnerships.

This event will feature speakers from government entities looking for new solutions, prime contractors that need subcontractors, and new funders looking to increase the speed of solving government problems with small business solutions. Speakers include Dr. George Kailiwai III, Director, Requirements and Resources (J8), Headquarters, U.S. Indo-Pacific Command (HQ USINDOPACOM); Dr. Martin Lindsey, Science & Technology Advisor to USINDOPACOM; science advisors; and SBIR program managers from various federal agencies.

Participants will have the opportunity to engage in:

  • Tech Showcase and Pitching Events
  • Informational Sessions
  • Panel Discussions
  • Networking Reception

To learn more about the upcoming conference and to register, please visit the website at https://www.htdc.org/pacifictech/.

Leave a Reply

featured blogs
Sep 26, 2022
Most engineers are of the view that all mesh generators use an underlying geometry that is discrete in nature, but in fact, Fidelity Pointwise can import and mesh both analytic and discrete geometry. Analytic geometry defines curves and surfaces with mathematical functions. T...
Sep 22, 2022
On Monday 26 September 2022, Earth and Jupiter will be only 365 million miles apart, which is around half of their worst-case separation....
Sep 22, 2022
Learn how to design safe and stylish interior and exterior automotive lighting systems with a look at important lighting categories and lighting design tools. The post How to Design Safe, Appealing, Functional Automotive Lighting Systems appeared first on From Silicon To Sof...

featured video

PCIe Gen5 x16 Running on the Achronix VectorPath Accelerator Card

Sponsored by Achronix

In this demo, Achronix engineers show the VectorPath Accelerator Card successfully linking up to a PCIe Gen5 x16 host and write data to and read data from GDDR6 memory. The VectorPath accelerator card featuring the Speedster7t FPGA is one of the first FPGAs that can natively support this interface within its PCIe subsystem. Speedster7t FPGAs offer a revolutionary new architecture that Achronix developed to address the highest performance data acceleration challenges.

Click here for more information about the VectorPath Accelerator Card

featured paper

Algorithm Verification with FPGAs and ASICs

Sponsored by MathWorks

Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers. This eBook explores different aspects of hardware design verification and how you can use MATLAB and Simulink to reduce development effort and improve the quality of end products.

Click here to read more

featured chalk talk

EiceDRIVER™ F3 Enhanced: Isolated Gate Driver with DESAT

Sponsored by Mouser Electronics and Infineon

When it comes to higher power applications, galvanically isolated gate drivers can be great solution for power modules and silicon carbide MOSFETS. In this episode of Chalk Talk, Amelia Dalton and Emanuel Eni from Infineon examine Infineon’s EiceDRIVER™ F3 Enhanced isolated gate driver family. They take a closer look at advantages of galvanic isolation and the key features and benefits that this gate driver family can bring to your next design.

Click here for more information about Infineon Technologies Eval-1ED3321MC12N Evaluation Board