industry news
Subscribe Now

Microchip and STAR-Dundee Create First SpaceVPX -Compliant Development Platform Featuring Radiation-Tolerant FPGAs and SpaceFibre Technology

Platform enables developers to implement new high-speed data transfer technology for modern spacecraft using Microchip’s radiation-tolerant RTG4™ FPGAs

CHANDLER, Ariz., June 11, 2019 — Microchip Technology Inc. (Nasdaq: MCHP), via its Microsemi subsidiary, collaborated with STAR-Dundee to create an evaluation platform that implements SpaceFibre technology, which was recently recognized by the VITA Standards Organization (VSO) as a control-and-data plane option for its SpaceVPX interconnect standard.

The SpaceFibre standard is already published as a very high-speed serial link standard by the European Cooperation for Space Standardization.

The STAR-Dundee 3U SpaceVPX demonstration board speeds the development of flexible, high-speed SpaceVPX (VITA-78)-compliant data-networking systems for space applications. As the first of its kind to feature FPGAs that are immune to radiation-induced configuration changes, the development board uses the unique architecture of Microchip’s RTG4 devices to optimize performance while providing systems with a critical additional level of failure protection in space.

As SpaceVPX increases in popularity for use in payload processor and system controller modules, the SpaceVPX-compliant platform utilizing SpaceFibre technology and Microchip’s RTG4 FPGAs provides the following benefits:

  • Offers much higher performance than was possible with the previous SpaceWire data transmission standard
  • Supports increasing demand for data to be transmitted between boards and systems onboard modern spacecraft
  • Reduces mass and in return reduces cost by operating over electrical or fiberoptic cables
  • Improves system reliability by enabling virtual planes to carry data, control and management information
  • Protects spaceflight systems from configuration upsets in harsh radiation environments through built-in radiation mitigation techniques

Microchip’s non-volatile RTG4 FPGAs include logic resources, digital signal processing math blocks and 24 on-chip high-speed serializer/deserializer (SERDES) lanes and can be used to implement data-handling and processing subsystems that have multi-Gbit/s SpaceFibre interfaces. Additional information on the RTG4 FPGAs is available here.

About Microchip Technology

Microchip Technology Inc. is a leading semiconductor supplier of smart, connected and secure embedded control solutions. Its easy-to-use development tools and comprehensive product portfolio enable customers to create optimal designs which reduce risk while lowering total system cost and time to market. The company’s solutions serve more than 125,000 customers across the industrial, automotive, consumer, aerospace and defense, communications and computing markets. Headquartered in Chandler, Arizona, Microchip offers outstanding technical support along with dependable delivery and quality. For more information, visit the Microchip website at www.microchip.com.

Leave a Reply

featured blogs
Jul 2, 2020
Using the bitwise operators in general, and employing them to perform masking operations in particular, can be extremely efficacious....
Jul 2, 2020
In June, we continued to upgrade several key pieces of content across the website, including more interactive product explorers on several pages and a homepage refresh. We also made a significant update to our product pages which allows logged-in users to see customer-specifi...
Jun 26, 2020
[From the last episode: We looked at the common machine-vision application and its primary .] We'€™ve seen that vision is a common AI these days, and we'€™ve also talked about the fact that our current spate of neural networks are not neuromorphic '€“ that is, they'€™...

Featured Video

Product Update: Advances in DesignWare Die-to-Die PHY IP

Sponsored by Synopsys

Hear the latest about Synopsys' DesignWare Die-to-Die PHY IP for SerDes-based 112G USR/XSR and parallel-based HBI interfaces. The IP, available in advanced FinFET processes, addresses the power, bandwidth, and latency requirements of high-performance computing SoCs targeting hyperscale data center, AI, and networking applications.

Click here for more information about DesignWare Die-to-Die PHY IP Solutions

Featured Paper

Cryptography: A Closer Look at the Algorithms

Sponsored by Maxim Integrated

Get more details about how cryptographic algorithms are implemented and how an asymmetric key algorithm can be used to exchange a shared private key.

Click here to download the whitepaper

Featured Chalk Talk

High Speed Cable Product Technology

Sponsored by Samtec

Today’s multi-gigabit high speed serial connections demand a new generation of cables and connectors. With PAM4 and speeds reaching 56 and 112 Gbps, older technology cannot deliver the signal integrity you need. In this episode of Chalk Talk, Amelia Dalton chats with Brian Niehoff from Samtec about keeping those eyes wide open with advanced connectivity solutions for high-speed design.

Click here to download the High-Speed Cable Interconnect Solutions Guide